dshekter

Results 1 issues of dshekter

Hi, The axi_dmac driver doesn't properly set/clear the cyclic bit in axi_dmac_transfer_start. In my testing, ``` // Set flags as needed if (dmac->transfer.cyclic != CYCLIC) { axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS, &reg_val); reg_val...