donnie-j

Ok, I thought it was the decoder using different 4 input logic gates, but I was wrong about the cause of this. The only one that sticks out, and only...

In the FWIW dept, I think the #BUS_SORT result might be helpful for routing (or more correctly, achieving good placement) from the register files to the execution units in the...

> my suspicion would be the first is true and the second is false, and the 1RW timing diagram is wrong because read happens in the same cycle as write....

For completeness, here is the same test bench run against a macro with flops `USE_LATCH=0` instead of latch cells. The change in size is not that significant, but I suspect...

No, the template is the easy part. The problem is synthesis of the bootloader RTL results in a bitstream with incorrect logic, evidenced by impossibly small utilisation.

Thanks for that, happy to engage. We try to track mainline development, and I did notice that something has gone wrong with environment variables between our last known good OpenLane...

> Hi, I’m looking to use the local installer, however in this environment it may not be possible to sudo. Can we point to local install via a Conda Prefix...

Installing locally as root system wide doesn't require sudo, so it's the same as local to the user. That lets us patch out the need for sudo generally in the...

Sorry for the long delay. Here is a link to the scripts, now forward ported to the latest OpenLane and Open PDKs, that we use to build installs of all...

I think there are 2 different (possibly related) problems here. The first is that the lpflow and to a lesser extent spare macro cells don't really make much sense without...