Daniel Beer

icon indicating a website link http://www.dlbeer.co.nz/ icon indicating an email [email protected]

icon location New Zealand

Results 120 comments of Daniel Beer

flash-bsl doesn't seem to work

On Thu, Sep 01, 2016 at 03:53:52PM -0700, Rick Kimball wrote: > Close but no cigar, and the delays from the original is 50ms vs 1ms > > ``` >...

Add outer alloc memory buffer options.

It looks like this code assumes that quirc_pixel_t is uint8_t? It may be different depending on compile-time options, so that needs to be taken into account in any allocations, and...

<reg[3] for special meaning.> <I new a project using IAR, and debug it with the IAR simulator. I modified the instruction byte code, and get strange assembles that are not documented. I draw a conclusion in my opinion, for the following instructions: [0 0 0 0 src 1 1 0 0 dst — MOVA Rsrc,Rdst], [0 0 0 0 src 1 1 0 1 dst — CMPA Rsrc,Rdst], [0 0 0 0 src 1 1 1 0 dst — ADDA Rsrc,Rdst], [0 0 0 0 src 1 1 1 1 dst — SUBA Rsrc,Rdst], when src is reg[3], it has special meanings. According to the oper, the Rsrc is MOVA: 0. CMPA: 0. ADDA: 2. SUBA: 2.>

On Sat, Jun 05, 2021 at 09:18:11AM -0700, Zhao Lei wrote: > > You can view, comment on, or merge this pull request online at: > > https://github.com/dlbeer/mspdebug/pull/105 > >...

<reg[3] for special meaning.> <I new a project using IAR, and debug it with the IAR simulator. I modified the instruction byte code, and get strange assembles that are not documented. I draw a conclusion in my opinion, for the following instructions: [0 0 0 0 src 1 1 0 0 dst — MOVA Rsrc,Rdst], [0 0 0 0 src 1 1 0 1 dst — CMPA Rsrc,Rdst], [0 0 0 0 src 1 1 1 0 dst — ADDA Rsrc,Rdst], [0 0 0 0 src 1 1 1 1 dst — SUBA Rsrc,Rdst], when src is reg[3], it has special meanings. According to the oper, the Rsrc is MOVA: 0. CMPA: 0. ADDA: 2. SUBA: 2.>

Hi Zhao, Sorry, I didn't get a notification when you'd changed the message, so I didn't notice that you'd done it! The explanation is good, but if you could format...

<reg[3] for special meaning.> <I new a project using IAR, and debug it with the IAR simulator. I modified the instruction byte code, and get strange assembles that are not documented. I draw a conclusion in my opinion, for the following instructions: [0 0 0 0 src 1 1 0 0 dst — MOVA Rsrc,Rdst], [0 0 0 0 src 1 1 0 1 dst — CMPA Rsrc,Rdst], [0 0 0 0 src 1 1 1 0 dst — ADDA Rsrc,Rdst], [0 0 0 0 src 1 1 1 1 dst — SUBA Rsrc,Rdst], when src is reg[3], it has special meanings. According to the oper, the Rsrc is MOVA: 0. CMPA: 0. ADDA: 2. SUBA: 2.>

Ok, thank you for your work on this. If you let me know when you think you have something ready, I'll merge. Let me know if you need any information...

MSP-EXP430F5438 Firmware download failed

On Fri, Oct 20, 2017 at 03:17:22PM +0000, chaisme wrote: > I am trying to run RIOT-OS on MSP430 and am using mspdebug to program on Ubuntu 16.04 . It...

QR code standards/variants supported?

On Mon, Aug 31, 2020 at 02:32:53AM -0700, Francesco Pretto wrote: > For software selection purposes, can you be a little bit more specific > in the README.md about what...

QR code V40 (binary data) not decoded

Taking a photo of a backlit LCD screen is unlikely to give you a suitable image for scanning, especially of a large code. If you zoom in on the image...

Handling of ECC error

Yes, it is necessary to do this yourself. Many ECC chips will handle it for you in hardware. If you need a software implementation, there's example code provided for BCH...

Would it be possible to somehow reduce stack requirements?

On Thu, Sep 12, 2019 at 11:30:46PM -0700, Freddie Chopin wrote: > Compiling the code with `-fstack-usage` shows that some of the functions use a lot of stack - for...