riscduino Iverilog Version

Hi Dinesh, I have a problem when verifying the user_usb, the iverilog I'm using gives me a warning like this, could you tell me which iverilog you are using?

Jul 14 '24 00:07 redpanda3

mine is 11.

Jul 14 '24 00:07 redpanda3

These are warning, simulation still will work.

Jul 14 '24 02:07 dineshannayya

Could you please take a look at it here? I see no waveform generated.

Jul 14 '24 04:07 redpanda3

I don't see Error details, Mostly if will be at starting of the log

Jul 14 '24 05:07 dineshannayya

Yes, you are correct. Seems that problem came from AES module, I will take a look at that. Thank you.

Jul 14 '24 06:07 redpanda3

Looks like there are lint issues due to the latest iverilog, I have pushed fixes back to repo .. You can pull the changes and update sub-git repos also.

I have uploaded the run.rtl.log also in verilog/dv/user_usb folder

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image.png (view on web) https://github.com/user-attachments/assets/7aab057e-14fd-45c0-ab96-a329cac6a9b9 Yes, you are correct. Seems that problem came from AES module, I will take a look at that. Thank you.

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Jul 14 '24 06:07 dineshannayya

Thank you.

Jul 14 '24 06:07 redpanda3

In the security_core provided in the submodule, the version might not be the latest(has no idle signal). After git pull the latest and manually upgrade the security_core, dv now works. Thank you.

Jul 14 '24 07:07 redpanda3