dimpolo

Add new chip variants

3

WIP for https://github.com/stm32-rs/stm32g0xx-hal/issues/78 This currently breaks existing variants because of https://github.com/stm32-rs/stm32-rs/issues/641 There is also something wrong with the new variants. I'm getting errors like: ``` unresolved imports `crate::stm32::FLASH`, `crate::stm32::PWR`, `crate::stm32::RCC`...

I didn't see this documented and was quite surprised by this. Is the reason simply because target::interrupt::Mutex requires a CriticalSection or are there hardware reasons for disableing interrupts? Could the...

When parsing something like: `number = 1000` into a `u8` I'm getting: ``` error: proc-macro derive panicked = help: message: called `Result::unwrap()` on an `Err` value: Error("number too large to...

Does one have to disable interrupts before using `FlashStorage::write`?

10

I'm seeing this backtrace on a ESP32S3 when ISRs are being ran on the same core: Backtrace ``` Exception occured 'IllegalInstruction' Context PC=0x4201219e PS=0x00060030 0x4201219e - core::sync::atomic::atomic_load at C:\Users\d.polonski\.rustup\toolchains\esp\lib\rustlib\src\rust\library\core\src\sync\atomic.rs:3153 0x00060030...

`Input` does not implement `RtcPin`

3

I'd like to express something like: ```rust let mut pin = Input::new(io.pins.gpio4, Pull::None); // use pin normally here let ext0 = Ext0WakeupSource::new(&mut pin, WakeupLevel::High); // use pin as a deep...

Boolean expression performs redundant bool check

1

```python n = 0 class Test: def __bool__(self): global n n += 1 return False Test() and False or False assert n == 1 ``` CPython optimizes this check in:...

So I spend a while figuring out why my interrupts weren't working and it seems like I wasn't the first. I think `cortex_m::asm::bootload` should at least mention setting VTOR in...

How does sleep work on multicore chips?

2

I noticed that calling `Rtc::sleep_deep` from the second core does not put the first core to sleep. Is this expected behavior? Is it possible for the second core to put...