David Garske

@SparkiDev I've got a few RISC-V targets here now, so I will try this on actual HW.

HiFive Unleashed at 1.4GHz The new asm is like 50 times faster ``` ./configure --enable-riscv-asm && make root@HiFiveU:~/wolfssl-riscv# ./wolfcrypt/benchmark/benchmark -aes-cbc -aes-gcm------------------------------------------------------------------------------ wolfSSL version 5.7.0 ------------------------------------------------------------------------------ Math: Multi-Precision: Wolf(SP) word-size=64 bits=3072...

> ./configure --enable-all --enable-riscv-asm > > ``` > wolfcrypt/src/aes.c: In function '_AesXtsHelper': > wolfcrypt/src/aes.c:12631:16: error: implicit declaration of function '_AesEcbEncrypt'; did you mean 'wc_AesEcbEncrypt'? [-Werror=implicit-function-declaration] > 12631 | return _AesEcbEncrypt(aes,...

@SparkiDev is this RISC-V ASM PR ready for merge? I can’t tell if you are planning to push anything else to it.

Updated benchmarks: HiFive Unleashed at 1.4GHz ``` ./configure --enable-all --enable-riscv-asm make root@HiFiveU:~/wolfssl# ./wolfcrypt/benchmark/benchmark ------------------------------------------------------------------------------ wolfSSL version 5.7.0 ------------------------------------------------------------------------------ Math: Multi-Precision: Wolf(SP) word-size=64 bits=4096 sp_int.c wolfCrypt Benchmark (block bytes 1048576, min...

Thanks @Frauschi. Okay to test. Contributor agreement on file.

@anhu please regression test this PR #7576 and #7577 ?

Thanks @Frauschi. Okay to test. Contributor agreement on file.

Thank you @jachin84 for this information! @danielinux perhaps we can add a README Signing.md section for how to sign with Azure Key Vault?

Retest this please