skidl
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devbisme
SKiDL is a module that extends Python with the ability to design electronic circuits.
fixes https://github.com/devbisme/skidl/issues/167 The following branch allows the `generate_svg()` function to work properly with a KiCAD version 7 (and probably version 6) library, but I need some feedback on a few...
**Describe the bug** Hi devbisme, When I running the function generate_pcb(), I get a WARNING: `WARNING: kinet2pcb module is missing. Can't generate a KiCad PCB without it.` but I have...
**Describe the bug** KiCad released new version "KiCad 7.0.0" on Feb/12/2023, skidl's part method call on KiCad-7.0.0 would result in KeyError: "F0" **To Reproduce** Steps to reproduce the behavior: 1....
Hello, Thank you for your wonderful work. I'm currently facing an issue with SKiDL when trying to use generate_svg(). I would appreciate any guidance on how to resolve these warnings...
When creating Nets as part of extending a Bus, create the nets as part of the circuit of what we want to connect them to, rather than the default circuit....
**Describe the bug** generate_schematic() File "/Library/Frameworks/Python.framework/Versions/3.10/lib/python3.10/site-packages/skidl/circuit.py", line 1044, in generate_schematic tool_modules[tool].gen_schematic(self, **kwargs) File "/Library/Frameworks/Python.framework/Versions/3.10/lib/python3.10/site-packages/skidl/tools/kicad7/gen_schematic.py", line 733, in gen_schematic preprocess_circuit(circuit, **options) File "/Library/Frameworks/Python.framework/Versions/3.10/lib/python3.10/site-packages/skidl/tools/kicad7/gen_schematic.py", line 676, in preprocess_circuit calc_part_bbox(part) File "/Library/Frameworks/Python.framework/Versions/3.10/lib/python3.10/site-packages/skidl/tools/kicad7/gen_schematic.py", line...
changing the test in `part_query.py` to ```python if "kicad" not in type_.lower(): continue ``` Fixes things. The test is probably specific enough: who else is going to have 'kicad' in...
oops, we have a type s/RunTimeError/RuntimeError/ ```python File "/home/john/code/16-channel/.venv/lib/python3.11/site-packages/skidl/tools/kicad/kicad.py", line 752, in _parse_lib_part_kicad_v6 part_defn = parse_sexp(self.part_defn, allow_underflow=True) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/home/john/code/16-channel/.venv/lib/python3.11/site-packages/skidl/utilities.py", line 833, in parse_sexp raise RunTimeError("Bracketing mismatch!") ^^^^^^^^^^^^ NameError: name...
I have an ERC warning output, part of which shows: ```shell ERC WARNING: Unconnected pin: PASSIVE pin 2/~ of R/R2. ERC WARNING: Unconnected pin: PASSIVE pin 2/~ of R/R5. ERC...
**Describe the bug** Some parts in the 74xx library (6.0.11) load fine. Others refuse to load. Of those which do load I'm surprised to see duplicated pins. Does SKIDL handle...