Yangyu Chen

Parameters: replace val with def in trait HasXSParametes

1

This will make FIR elaboration much faster as discussed in #2951

#### Before start - [x] I have read the [RISC-V ISA Manual](https://github.com/riscv/riscv-isa-manual). - [x] I have read the [XiangShan Documents](https://xiangshan-doc.readthedocs.io/zh_CN/latest). - [x] I have searched the previous issues and did...

fix vm_flags modification for Linux v6.3

2

The [vm_flags modifier functions](https://lore.kernel.org/all/[email protected]/) have been introduced to prevent racing since Linux Kernel v6.3. However, the vm_flags have become const since this version. This PR changed the modified code to...

The xvsec takes about 50 seconds to replace a 30MB PR block bitstream on VCU118. When I use Linux v6.3 with an xvsec patch from #142 on my host, the...

The ACLINT specification says: > The RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification. The register definitions and register offsets of the MTIMER and...

GenericDRAMController seems does not support write transaction

1

I tried to use ramulator2 to test DDR write performance. A simple code is shown above: ```cpp #include #include #include #include #include Ramulator::IFrontEnd* ramulator2_frontend; Ramulator::IMemorySystem* ramulator2_memorysystem; long long call_back_count =...

AXI4UART: dynamically adjust txDataPos using beatBytes

2

txData is not always on wdata(7,0) when AXI4 DataWidth >= 32 bits, we should adjust it dynamically.

#### Before start - [x] (Select what you have done like this) - [x] I have read the [RISC-V ISA Manual](https://github.com/riscv/riscv-isa-manual) and this is not a RISC-V ISA question. -...

detect risc-v vector extension

1

The RISC-V Vector Extension adds a vcsr CSR since version 0.8, which does not appear in version 0.7.1. I confirmed this on Sipeed Lichee Pi 4A, which has T-Head C910...

[Feature]: Consider remove PMP locking and don't set MXSTATUS.MAEE from U-Boot to support generic OpenSBI

2

### Feature description Remove these 3 lines which lock PMP entries: https://github.com/kendryte/k230_sdk/blob/3ade2d07710fbbd5ab2e0919aa29298696873750/src/little/uboot/arch/riscv/cpu/k230/cpu.c#L82-L84 Change this line to `csr_write(CSR_MXSTATUS, 0x438000)` to disable the MAEE extension and move it to customized Kernel with...