implement some FP32 instructions (fadd.s, fsub.s, flw, fsw)

[Jingqing3948]

This pr is the follow up of https://github.com/cvut/qtrvsim/pull/109.

Sry that because I didn't pass the test cases, I reviewed the code again and accidentally lost the last pr. Thanks to the help of @trdthg , he helped me to modify the test cases (because origin misa register stores supported extensions, so RVF is also needed to be add to misa?)

Now the code can pass the CI for now, and successfully execute those FP instructions.