Christoph Schlosser

Not really exclusive to the boolean option with the fact that `"doxdocgen.generic.returnTemplate"` can insert a type. Since `"doxdocgen.generic.returnTemplate"` is also an existing option and to not break peoples current config...

Implement the `src/Common` interfaces in `src/Lang/SystemVerilog`. Add your new implementation to https://github.com/cschlosser/doxdocgen/blob/c703c6a053e113e1bac2de8991199f13e5d007d9/src/CodeParserController.ts#L117

This would probably be possible by adding a regex filter option. There are already keywords you can remove from the input that will be processed but I guess this won't...

@bcaddy that is not an issue of this addon. This is a problem with https://github.com/microsoft/vscode-cpptools syntax highlighting for Doxygen.

Please format your code and provide an example method where you expect the exact result

You will have to implement a parser for vhdl. It is possible but I'm not an expert in the VHDL language at all.

The information is available easily for the plugin. Problem with the user experience is that there may be confusion of which setting to use and they can easily get out...

Can you help implementing it?

Help is always welcome :)

Can you help implement it?