Javier Mora

The use of `in` for string comparison results in `"name" in "name2"` giving a false positive; the right thing is to use `==`. In peripheral_subsystem.sv.tpl, this may result in the...

Python: `<string_var> in ("<string>")` should be `<string_var> == "<string>"`

1

This issue affects the following files (that I noticed): * hw/core-v-mini-mcu/peripheral_subsystem.sv.tpl * util/mcu_gen.py For some reason, the Python `in` operator is being used to compare a string variable with a...

[reggen] If hjson file contains only windows and no regular registers, address miss is never handled

2

I'm reporting this reggen-related issue here because it is not clear to me if it applies to upstream reggen from OpenTitan ([**\[opentitan\]**/util/reggen/reg_top.sv.tpl](https://github.com/lowRISC/opentitan/blob/master/util/reggen/reg_top.sv.tpl)) or only X-HEEP's version of the tool. Scenario...

Support for multidimensional arrays

4

What is the status of multidimensional array support? As mentioned in #211, most (if not all) Verilog simulators "flatten" packed arrays such as `logic [1:0][3:0] data;` into a `data[7:0]` signal,...

Table "Compressed 16-bit RVC instruction formats" header indicating the bits corresponding to each column only aligns properly with the first row (CR format), but doesn't reflect the boundaries of other...

[docs] SPI and SPI2 are both in the peripheral subsystem, not in AO

4

The documentation ~~and diagram~~ claims that the "SPI" block is placed in the Always-on peripheral subsystem along with "SPI Flash", whereas "SPI 2" is in the Peripheral subsystem. However, it...