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Published 20 hours ago • verified publisher icon clash-lang

Don't terminate Verilog simulator on error in assertion functions

Open martijnbastiaan opened this issue 7 months ago • 0 comments

Relevant PR: https://github.com/clash-lang/clash-compiler/pull/2258. Unfortunately, we can't accept the PR as is, because it just changes which simulators get stuck / exit prematurely.

martijnbastiaan avatar Jul 10 '24 12:07 martijnbastiaan