chef
lscpu parser doesn't parse Raspberry Pi 4 (ARM Cortex-A72) output
Description
As a result of https://github.com/chef/ohai/pull/1454, node['cpu'] is nil since the lscpu output is not parsed properly. I would have expected the fallback to go to /proc/cpuinfo.
Ohai Version
v17.9.0
Platform Version
Ubuntu 22.04 Linux arm64
Ohai Output
lscpu output
Attached are the outputs that can be used in the tests. Notice the indentation and Core(s) per cluster instead of Core(s) per socket: https://github.com/util-linux/util-linux/blob/60803291acc7f431fd7750de7b2a2f1d45db1f4d/sys-utils/lscpu.c#L883
Architecture: aarch64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Vendor ID: ARM
Model name: Cortex-A72
Model: 3
Thread(s) per core: 1
Core(s) per cluster: 4
Socket(s): -
Cluster(s): 1
Stepping: r0p3
CPU max MHz: 1500.0000
CPU min MHz: 600.0000
BogoMIPS: 108.00
Flags: fp asimd evtstrm crc32 cpuid
Caches (sum of all):
L1d: 128 KiB (4 instances)
L1i: 192 KiB (4 instances)
L2: 1 MiB (1 instance)
Vulnerabilities:
Itlb multihit: Not affected
L1tf: Not affected
Mds: Not affected
Meltdown: Not affected
Mmio stale data: Not affected
Spec store bypass: Vulnerable
Spectre v1: Mitigation; __user pointer sanitization
Spectre v2: Vulnerable
Srbds: Not affected
Tsx async abort: Not affected
cpuinfo-aarch64-rpi4.output.txt lscpu-aarch64-rpi4-cores.output.txt lscpu-aarch64-rpi4.output.txt
Note that lscpu can list multiple CPUs if there are available, so I think the parser needs to be updated with that in mind.
lscpu can output in JSON format with -J: shouldn't Ohai be using that?
It seems lscpu v2.37 changed the output to use these sections: https://github.com/util-linux/util-linux/commit/91eef60ca33e1fb0a7be36a5c2a67f1a650feba7
The lscpu -J output on Ubuntu 22.04:
{
"lscpu": [
{
"field": "Architecture:",
"data": "aarch64",
"children": [
{
"field": "CPU op-mode(s):",
"data": "32-bit, 64-bit"
},{
"field": "Byte Order:",
"data": "Little Endian"
}
]
},{
"field": "CPU(s):",
"data": "4",
"children": [
{
"field": "On-line CPU(s) list:",
"data": "0-3"
}
]
},{
"field": "Vendor ID:",
"data": "ARM",
"children": [
{
"field": "Model name:",
"data": "Cortex-A72",
"children": [
{
"field": "Model:",
"data": "3"
},{
"field": "Thread(s) per core:",
"data": "1"
},{
"field": "Core(s) per cluster:",
"data": "4"
},{
"field": "Socket(s):",
"data": "-"
},{
"field": "Cluster(s):",
"data": "1"
},{
"field": "Stepping:",
"data": "r0p3"
},{
"field": "CPU max MHz:",
"data": "1500.0000"
},{
"field": "CPU min MHz:",
"data": "600.0000"
},{
"field": "BogoMIPS:",
"data": "108.00"
},{
"field": "Flags:",
"data": "fp asimd evtstrm crc32 cpuid"
}
]
}
]
},{
"field": "Caches (sum of all):",
"data": null,
"children": [
{
"field": "L1d:",
"data": "128 KiB (4 instances)"
},{
"field": "L1i:",
"data": "192 KiB (4 instances)"
},{
"field": "L2:",
"data": "1 MiB (1 instance)"
}
]
},{
"field": "Vulnerabilities:",
"data": null,
"children": [
{
"field": "Itlb multihit:",
"data": "Not affected"
},{
"field": "L1tf:",
"data": "Not affected"
},{
"field": "Mds:",
"data": "Not affected"
},{
"field": "Meltdown:",
"data": "Not affected"
},{
"field": "Mmio stale data:",
"data": "Not affected"
},{
"field": "Spec store bypass:",
"data": "Vulnerable"
},{
"field": "Spectre v1:",
"data": "Mitigation; __user pointer sanitization"
},{
"field": "Spectre v2:",
"data": "Vulnerable"
},{
"field": "Srbds:",
"data": "Not affected"
},{
"field": "Tsx async abort:",
"data": "Not affected"
}
]
}
]
}
Compared to:
{
"lscpu": [
{"field":"Architecture:", "data":"x86_64"},
{"field":"CPU op-mode(s):", "data":"32-bit, 64-bit"},
{"field":"Byte Order:", "data":"Little Endian"},
{"field":"Address sizes:", "data":"46 bits physical, 48 bits virtual"},
{"field":"CPU(s):", "data":"8"},
{"field":"On-line CPU(s) list:", "data":"0-7"},
{"field":"Thread(s) per core:", "data":"1"},
{"field":"Core(s) per socket:", "data":"8"},
{"field":"Socket(s):", "data":"1"},
{"field":"NUMA node(s):", "data":"1"},
{"field":"Vendor ID:", "data":"GenuineIntel"},
{"field":"CPU family:", "data":"6"},
{"field":"Model:", "data":"79"},
{"field":"Model name:", "data":"Intel(R) Xeon(R) CPU E5-2686 v4 @ 2.30GHz"},
{"field":"Stepping:", "data":"1"},
{"field":"CPU MHz:", "data":"2300.171"},
{"field":"BogoMIPS:", "data":"4600.00"},
{"field":"Hypervisor vendor:", "data":"Xen"},
{"field":"Virtualization type:", "data":"full"},
{"field":"L1d cache:", "data":"256 KiB"},
{"field":"L1i cache:", "data":"256 KiB"},
{"field":"L2 cache:", "data":"2 MiB"},
{"field":"L3 cache:", "data":"45 MiB"},
{"field":"NUMA node0 CPU(s):", "data":"0-7"},
{"field":"Vulnerability Itlb multihit:", "data":"KVM: Mitigation: VMX unsupported"},
{"field":"Vulnerability L1tf:", "data":"Mitigation; PTE Inversion"},
{"field":"Vulnerability Mds:", "data":"Vulnerable: Clear CPU buffers attempted, no microcode; SMT Host state unknown"},
{"field":"Vulnerability Meltdown:", "data":"Mitigation; PTI"},
{"field":"Vulnerability Spec store bypass:", "data":"Vulnerable"},
{"field":"Vulnerability Spectre v1:", "data":"Mitigation; usercopy/swapgs barriers and __user pointer sanitization"},
{"field":"Vulnerability Spectre v2:", "data":"Mitigation; Retpolines, STIBP disabled, RSB filling"},
{"field":"Vulnerability Srbds:", "data":"Not affected"},
{"field":"Vulnerability Tsx async abort:", "data":"Not affected"},
{"field":"Flags:", "data":"fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology cpuid tsc_known_freq pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm cpuid_fault invpcid_single pti fsgsbase bmi1 avx2 smep bmi2 erms invpcid xsaveopt"}
]
}
The documentation does say:
The output for non-terminals (e.g., pipes) is never affected by this optimization and it is always in "Field: data\n" format. Use for example
lscpu | lessto see the default output without optimizations.
I've verified that's the case, so maybe we're okay here and just need to handle the Thread(s) per cluster differences.