XSAVE_SIZE hardcoding could cause potential issues with AMX

[karthik-intel]

Intel Advanced Matrix Extensions (Intel AMX) can cause the user state XSAVE components to exceed the hardcoded size of 4096 (https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf). Specifically, user state component 18, called XTILEDATA, has an architectural maximum size of 65535 bytes and an actual size of 8192 bytes in the first implementation. However, XSAVE_SIZE is defined to be 4096 in the CRIU source (https://github.com/checkpoint-restore/criu/blob/criu-dev/compel/arch/x86/src/lib/include/uapi/asm/fpu.h), which could cause potential problems in CPUs with AMX.

[mihalicyn]

@karthik-intel hi!

Thanks for your report. I've checked my CPU (8750H) looks like it hasn't these extensions. Do I understand correctly that these features available only on the 11th generation of Intel processors?

[karthik-intel]

@mihalicyn, thank you for the quick note! These extensions will be part of future processors (https://en.wikipedia.org/wiki/Alder_Lake_(microprocessor))

[avagin]

Cc: @0x7f454c46 @cyrillos

[0x7f454c46]

https://github.com/checkpoint-restore/criu/commit/2fdc09499d9df9c9e61d53cf0c121e3338538a8f#diff-53c8fb3b0e70ae163cfa6b9e86a4ac4ce339d505b99bfbb764a93cb425e4b8e6R235 (patches are welcome)

[cyrillos]

Yes, new CPUs will require a way bigger frame up to 2M iirc so someone has to implement the support of new models.

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