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AArch64 IR instruction fix for `rbit` instruction and `ctr_el0` register
Add lost rbit instruction and fix ctr_el0 register
https://developer.arm.com/documentation/ddi0597/latest/Base-Instructions/RBIT--Reverse-Bits- https://developer.arm.com/documentation/ddi0601/2024-12/AArch64-Registers/CTR-EL0--Cache-Type-Register