installing systick exception handler when VTOR is set by another OS (TI SYSBIOS)

[alefminus]

I'm trying to give lilos a go in a project that is using TI SYSBIOS. I'm not sure this is a case that you would find very interesting but I am hoping to get some feedback since I'm not entirely sure what I am doing.

The hardware is a CC1352R1 MCU from TI that is running a single task via TI SYSBIOS (version 6.20) ; It does not use systick at all, so I thought it should be possible to use. It does expect interrupts to not be disabled by user space so I am using run_tasks_with_preemption, which gets me a little bit ahead. The next problem I have, which this ticket is about, is that the systick exception handler is defined via the exception macro in time.rs but that doesn't place it actually in the vector table, which as I said is moved by TI to the start of SRAM (0x2000_0000 specifically).

My question (finally, sorry) is if adding a function to lilos that would allow installing the handler during runtime (as opposed to link time via #[exception]) is something you would be interested in carrying, and does it make any sense? something like

pub fn install_systick_handler(offset: u32) {
// read vtor
// set vtor + systick interrupt vector offset to the address of fn SysTick
}

[alefminus]

This works - just to show what I am talking about; Tested on CC1352R1 with Sysbios 6.20

-pub fn initialize_sys_tick(syst: &mut SYST, clock_hz: u32) {
+pub fn initialize_sys_tick(syst: &mut SYST, scb: &mut SCB, clock_hz: u32) {
+    // read VTOR first to make sure where we need to install the exception handler,
+    // if it is set use it to register SysTick exception handler below
     let cycles_per_millisecond = clock_hz / 1000;
     syst.set_reload(cycles_per_millisecond - 1);
     syst.clear_current();
     syst.set_clock_source(SystClkSource::Core);
     syst.enable_interrupt();
     syst.enable_counter();
+    let vtor = scb.vtor.read() & !0b1111111; // first 7 bits are reserved
+    if vtor >= 0x2000_0000 {
+        // assume this means the table is in RAM - this is architecture specific
+        // so this will never be upstreamed
+        let syst_address = (vtor + 15 * 4) as *mut u32;
+        let isr = __cortex_m_rt_SysTick as *const () as u32;
+        unsafe {
+            core::ptr::write_volatile(syst_address, isr);
+        }
+    }
 }