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SMI and samples loss

Open hea-lab opened this issue 2 years ago • 0 comments

Hi @meexmachina ,

Lately, I have been reviewing your new SMI kernel modules and if I understand well you are restarting SMI and DMA transfers as soon as you copied samples into kfifo. So, I am wondering how you could avoid 100% of loss because this restart process (SMI and DMA) occurs in DMA ISR (and this ISR may have some significant latency depending on system load and this latency could be large enough to fill up the FPGA fifos ending up in samples loss.

I have confirmed the above assumptions with a home made test bench using your drivers stressing a bit the system to simulate a decent user land application. From time to time I noticed some loss (more or less severe depending on the load). To detect such loss, I had to implement a transport protocol including sequence numbering and CRC otherwise it could be pretty difficult to detect some issues.

So my questions are as follows:

  1. Do you still rely on DMA ISR to restart the whole SMI/DMA process?
  2. Do you experience samples loss when stressing the system?
  3. Did you find a way to configure SMI for endless transfer - one start, infinite length -?

hea-lab avatar Mar 29 '22 12:03 hea-lab