padduw not implemented on MIPS

[GovanifY]

govanify@ThinkPadW500 ~ $ cat test.py 
from capstone import *

CODE= b"\x28\x0c\x00\x70"
md = Cs(CS_ARCH_MIPS, CS_MODE_32)
for i in md.disasm(CODE, 0x1000):
    print("0x%x:\t%s\t%s" %(i.address, i.mnemonic, i.op_str))
govanify@ThinkPadW500 ~ $ python test.py 
govanify@ThinkPadW500 ~ $ 

280c0070 should be disassembled as "padduw at, zero, zero" but is instead not implemented by capstone

[aquynh]

i am already planning to get a major update to Mips & other archs.

can you list all the missing instructions you can find here, for reference?

[GovanifY]

sure will check what I can for tomorrow, can't say it'll be a full list but I'll see what I can find missing

[wargio]

This cannot be patched because LLVM does not support MIPS EE SIMD instruction set.

Reference: https://psi-rockin.github.io/ps2tek/ (archived)

[Rot127]

For anyone bumping into this issue. There is the possibility to write the table gen file for the extension in LLVM. It will like not be up-streamed to LLVM because the extension is no longer in use. But we can use it to generate our files and support it in Capstone. This is how we do it for the PPC PS extension.