Attempt to fix TriCore missing registers

[Rot127]

Your checklist for this pull request

• [ ] I've documented or updated the documentation of every API function and struct this PR changes.
• [ ] I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

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Test plan

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Closing issues

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[XVilka]

@imbillow what do you think about this one?

[b1llow]

The bits used for checking in function TriCoreGenAsmWriter.inc::printInstruction() seem to be calculated this way.

  // Emit the opcode for the instruction.
  uint64_t Bits = 0;
  Bits |= (uint64_t)OpInfo0[MCInst_getOpcode(MI)] << 0;
  Bits |= (uint64_t)OpInfo1[MCInst_getOpcode(MI)] << 32;