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arm: simplify DecodeGPRPairRegisterClass()
For RegNo > 13 we return. After the return statement RegNo cannot be 0x0e.
Signed-off-by: Heinrich Schuchardt [email protected]
Thanks for PR, can you provide a test case and give a more detailed explanation about this pr?
Thanks for PR, can you provide a test case and give a more detailed explanation about this pr?
The RegNo > 13
check above guarantees that RegNo != 13
. Since 13 == 0xe
, there is no point in checking RegNo == 0xe
which is always false.
also, per #1781 the next
branch should be used instead of master
Thanks for PR, can you provide a test case and give a more detailed explanation about this pr?
The
RegNo > 13
check above guarantees thatRegNo != 13
. Since13 == 0xe
, there is no point in checkingRegNo == 0xe
which is always false.
I see, 14 == 0xe > RegNo.
Yes, we only accept PR for 'next' branch now, plz rebase it, thanks.
Will be overwritten by https://github.com/capstone-engine/capstone/pull/1949 cc @Rot127
@kabeor Can be closed. The function was already fixed by the LLVM folks and we get it with https://github.com/capstone-engine/capstone/pull/1949.
static DecodeStatus DecodeGPRPairRegisterClass(MCInst *Inst, unsigned RegNo,
uint64_t Address,
const void *Decoder)
{
DecodeStatus S = MCDisassembler_Success;
// According to the Arm ARM RegNo = 14 is undefined, but we return fail
// rather than SoftFail as there is no GPRPair table entry for index 7.
if (RegNo > 13)
return MCDisassembler_Fail;
if (RegNo & 1)
S = MCDisassembler_SoftFail;
unsigned RegisterPair = GPRPairDecoderTable[RegNo / 2];
MCOperand_CreateReg0(Inst, (RegisterPair));
return S;
}
Thanks a lot.