MIPS32R6: "pref" and "cache" missing operand unless preceeded by instruction

[lwerdna]

I get "pref , 0x1f(0xf000d)" if the pref is alone, or "pref 0, 0x1f(0xf000d)" if preceded by NOP. Instructions other than nop can affect this operand in different ways, but here's a minimal example:

from capstone import *
md = Cs(CS_ARCH_MIPS, CS_MODE_LITTLE_ENDIAN|CS_MODE_MIPS32R6)

print "with nop:"
for i in md.disasm("\x00\x00\x00\x00\xb5\x06\xff\x7d", 0):
	print("0x%x:\t%s\t%s" %(i.address, i.mnemonic, i.op_str))

print "without nop:"
for i in md.disasm("\xb5\x06\xff\x7d", 0):
	print("0x%x:\t%s\t%s" %(i.address, i.mnemonic, i.op_str))

which should print:

with nop:
0x0:	nop
0x4:	pref	0, 0x1f(0xf000d)
without nop:
0x0:	pref	, 0x1f(0xf000d)

[ljluestc]

The difference in the output is due to the presence or absence of the NOP instruction. The NOP instruction does not affect the operands of the following "pref" instruction, so the operand is disassembled as "0, 0x1f(0xf000d)" in the first case. However, without the NOP instruction, the disassembler cannot determine the preceding instruction's length, resulting in the operand being disassembled as ", 0x1f(0xf000d)".