AArch64 can't dissam new instruction which belong to armv8.2

[weiqi7777]

hi: now llvm has updated to 6.0.0, and for ARM, add many new instruction in the *.td file. but the capstone don't update it.
so some new instruction which belong to armv8.2 can't dissam. can you update it ?

for example: for AArch64_GenInstrInfo.inc in llvm, line 954, there is FMULX16 ins which belong to armv8.2 for AArch64_GenInstrInfo.inc in capstone, there is no FMULX16 ins.

the arm architecture has the same problem.

thank you

[aquynh]

we hopep to get some students working on GSoC to update the core of all architectures, but unfortunately we did not get anyone. so this will take sometime.

[XVilka]

Is something changed? Are there any hopes to have this done at all?

[XVilka]

See https://github.com/aquynh/capstone/pull/1011

[howjmay]

I am recently check out this project, but it seems SHA512 and SHA3 instructions which belongs to armv8.2 hasn't been supported yet?