[fud] Simplify and centralize fud configuration for Xilinx tools

[sampsyo]

There are several Xilinx-related stages in fud these days, and they all have different, overlapping sets of configuration options. In a spirit similar to #751's shared.data, we should centralize these in a xilinx section and remove duplication.

The current configuration options to be cleaned up are:

• synth-verilog.exec: The Vivado executable. This is hard-coded elsewhere, such as in xclbin, and should not be.
• wdb.{xilinx_location,xrt_location}: These are sort of redundant with synth-verilog.exec above. And these paths are also hard-coded in other locations.
• {synth-verilog,xclbin,wdb}.{ssh_host,ssh_username,remote}: The optional SSH server details. You should only need to set these once. Also, I'm not sure why there is a separate remote option; I think SSH should probably just be enabled when ssh_host is defined.
• xclbin.device: The FPGA device string. This is variously hard-coded in some places and ad-hoc shared by other stages.
• xclbin.temp_location: This just doesn't seem very useful; we should probably just remove it.
• fpga.data: Could be unified with other data options.