c0pperdragon

Yes, having a stable pixel clock seems also to cure the VSP bug. Getting this clock from my FPGA board is a kind of band-aid, but a proper solution would...

Ah, yes. I didn't realize that your board has the old-style clock circuit. This is indeed extremely bad, even worse than the already pretty awful MOS 8701. So you really...

Something like this would be needed, but it is still not ideal, because the FPGA input pins can only work with 3.3 and would possibly be damaged if directly feeding...

Oh, no,, this does not work either. This would break compatibility with PAL setups that use the pixel-clock mode. I need another solution still to make do with the limited...

Maybe this could work (a totally crazy hack now): Set up your circuit so that the JTAG pin 5 is either left open (for PAL) or connected to the pixel...

I definitely have to modify the firmware. But I guess I can make it in a way to still keep it compatible with any existing installations. So it is possible...

Abracadabra. Please give the 2.10beta2 firmware a try: https://github.com/c0pperdragon/A-VideoBoard/tree/master/c64mod/firmware If this works, it will become new 2.10 release.

I have changed the firmeware a bit more to now also support the pixel clock mod in conjunction with a 656756A chip. For you this should be the same, but...

The VIC-II needs the NTSC/PAL subcarrier frequency input in order to produce the correct color signal. In your board, this signal was produced by U31, as you have guessed. I...

Another user had the same problem with the exact same chip revision. The solution with the 47pF capacitor really seems to be the best cure for this. I keep this...