Hoist pure instructions just after side-effectful instructions

[fitzgen]

When a pure instruction is the only use of the result of a side-effectful instruction, we should hoist the pure instruction to just after the side-effectful instruction.

For example, given:

...

block42:
  ...
  v123 = load.i8 v36
  ...

block53:
  ...
  v199 = uextend.i32 v123
  ...

We should hoist the uextend to just after the load and ensure that the two instructions are in the same block:

...

block42:
  ...
  v123 = load.i8 v36
  v199 = uextend.i32 v123
  ...

This will ensure that when we decompose a Wasm instruction into smaller RISC-y bits, we can put them back together during instruction selection. If they are not in the same block, potentially because of the way that e-graph elaboration delays computing pure values until they are demanded, then we do not consider the load to be sinkable into the uextend, and we won't be able to put them back together anymore.

cc #8785 and #6154