Dániel Buga
Dániel Buga
> If Cortex-M0/M0+ is always single-core (is it?) No, see RP2040
I think we can move forward with this now.
As we're using atomic compare_exchange in our multi-core critical section implementation, can we enable `portable-atomic/critical-section` without things blowing up?
IMHO we should instead do `new().with_config()` but the compiler will first apply a default config so it's slightly less efficient... But I think I prefer the code bloat over the...
re "the compiler will apply a default config" we can also choose to roll with hardware default initially. This point of view would better align with individual setters, where there...
We should also think about what to do with SPI: currently we don't have an SpiDevice equivalent, which means we can't automatically reconfigure the bus for the devices' individual needs....
We should also think about split peripherals: what does `apply_config(uart::config::Config)` mean for UartTx, what does it mean for UartRx? What does it mean to change the baud rate for half...
I feel like this issue is made somewhat redundant by #2416
I suspect the two parts of this issue are independent: - `err_wr_mask` makes the peripheral essentially forget data that has partiy/framing/other errors, but otherise I think it should continue receiving...
^ a good thing to keep in mind, although we deliberately don't initialize any peripherals at this point.