exposed trace underneath F11
Is there supposed to be exposed copper underneath f11? I tried ordering and elecrow asked about this section.
Hey - thanks for catching that - that appears to be an error on the V0.8 hotswap variants (V0.8DHA and V0.8JHA). I'll make revisions V0.8.1DHA and V0.8.1JHA that remove that patch. It does pose a shorting risk where +3.3V could easily short to ground.
On V0.6.1D (and on V0.8D and V0.8J) that spot is where a bunch of vias surface and is for hand-soldering the pad underneath the QFN STM32F072's (-CBU6 and -CBU7), but the MCU moved for the hotswap variants but I forgot to delete the solder mask exclusion
Also - when I have time in a couple of weeks I'll prepare JLCPCB files for the V0.8 lineup, which should be cheaper than Elecrow in small quantities.