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codec: loss of 1 LSB on right channel
There is some either hardware bug or configuration issue of the TLV320AIC3100 codec, such that the right channel data is appearing shifted to the left by one, causing clipping on the right channel.
The suspicion is that the WCLK signal (sync in the i2s hardware) is asymmetric and/or arriving quite delayed compared to the I2S block's expectations, which is causing it to pick up an offset to the transition to the right channel.
A quick fix is to right-shift the right audio data to the right by 1 bit before sending down the pipe. This causes 1LSB precision loss on the right channel, but at least we can move ahead. Nobody would notice 1 LSB loss out of a 16-bit audio channel, except for the fact that I've opened a bug against it so we don't forget.
Screenshots of the BCLK/WCLK as generated by commit 46fa8fa01ecdb824979ac683b43a065d5e19ee9c
// 32 bits/word * 2 channels * 8000 samples/s = 512_000 = BCLK
// pick off of DAC_MOD_CLK = 1.024MHz
self.w(27, &[
0b00_00_1_1_0_1, // I2S standard, 16 bits per sample, BCLK output, WCLK output, DOUT is Hi-Z when unused
0b0, // no offset on left justification
0b0000_0_1_01, // BDIV_CLKIN = DAC_MOD_CLK, BCLK active even when powered down
0b1000_0010 // BCLK_N_VAL = 2, N divider is powered up
]);