Ben Marshall

Hi @marcfedorow - I've updated the spec in 1b66e0a - it turns out several instructions had the same typo. Thanks again for spotting this, I'll leave the issue open in...

I think the typography issues in the current spec will eventually be taken care of when the spec is merged into the main RISC-V specification, so thank you for providing...

My understanding was that although the crypto extension needs very large element widths, we absolutely would not require base V instructions to accommodate those element widths. I don't think there...

Hi @bulat242 Thanks for spotting this! Just to be clear - it looks like the pseudocode for `zip` and `unzip` are the wrong way around, right? I'll have to do...

> (UNZIP operation in spec is described as "inverse zip"). Yeah, that's a rubbish description for sure. I'll fix that. Okay, I'll follow this up at the weekly CETG meeting...

> And I would like to clarify about rev8 and brev8 descriptions. The _intent_ is to step through every byte in the register, so yes the `foreach` statements are supposed...

@bulat242 - The plan for fixing this is to make the necessary changes in the spec and do a `v1.0.0-rc3` release, and publicise this on the isa-dev mailing list. I'm...

@bulat242 - [Here's the fix](https://github.com/ben-marshall/riscv-bitmanip/commit/bdf5d148878c90ff9e21b06acaa50f28472176ba), hopefully this is a bit clearer than before!

I'm going to leave the issue open for now in case other people spot the same problem and try to report it. Thanks again for the catch!

Hi @bulat242 - The encodings were not modified from the proposed Bitmanip ones. If they are different that's likely a mistake. Note that we are only standardising the RV32 versions...