status flags currupted by inline hash lookup code

[amimo]

It seems like the inline hash lookup code may currupt the status flags.

cmp x0,x1
b label
...
label:
b.eq xx  ;; may be problematic if inline hash lookup is in use?

[GuillermoCallaghan]

Hi @amimo, the inline hash lookup does not change the status flag. Even when the target is not found, the status of the CPU is stored and later restored when producing a context switch.

[amimo]

the cmp instruction used by arm32 may change those flags, and i can't found where those flags are saved, except the dispatcher.

  // CMP r6, target
  arm_cmp(&write_p, REG_PROC, r6, target);
  write_p++;

[lgeek]

Yes the Aarch32 lookup will corrupt the status flags. I haven't found instances of software setting the status flags before taking an indirect branch and then reading them after. This implementation is a bit faster than using CB(N)Z, especially as it would require changing the mode from A32 to T32.

If you find examples of software doing this, we can convert it to the CBZ implementation (which is still much faster than writing to the CPSR).

[GuillermoCallaghan]

Hi @amimo, my bad, because you used X registers in your code example I thought you were talking about the AArch64 implementation of the inline hash lookup.