Alexander Brylev

Results 3 comments of Alexander Brylev

> Might you be willing to make a pull request with the fix, test case, and .out file to check the new error message? Yes, I would like to do...

Ok, thanks! I'll take it on and open a PR when I have something to show.

Something else. If you specify the top module ```bash verilator --binary -j 0 -top tb tb.sv ``` , then we get an internal error ```systemverilog %Error: Internal Error: tb.sv:3:8: ../V3LinkDot.cpp:422:...