[bug #25300] Additional i/o port names

[avrs-admin]

Sun 11 Jan 2009 12:46:27 PM CET

It's a common thing when single pin on a device represents several features, for example atmega8: PORTB: PB5 can be used as regular i/o port or SCK for SPI interface PB4 can be used as regular i/o port or MISO for SPI interface PB3 can be used as regular i/o port or MOSI for SPI interface PB2 can be used as regular i/o port or SS for SPI interface PORTD: PD0 can be used as regular i/o port or RX for usart PD1 can be used as regular i/o port or TX for usart etc... Almost every pin have several meanings. So if I'm trying to build software wich communicates using for example SPI interface, i have to use some of i/o ports in another meaning(write logical 1/0 to SS pin to select/deselect slave device) So i think it's a good idea to put such definitions to headers:

for example: #define SS   PB2 #define MOSI PB3 #define MISO PB4 #define SCK  PB5 #define SPI_PORT PORTB

#define RX PD0 #define TX PD1 #define USART_PORT PORTD

file #17814: xml.patch file #17813: io.patch file #17837: io.patch.bz2 file #17941: io.patch.bz2 file #18037: iomxx0_1.patch

This issue was migrated from https://savannah.nongnu.org/bugs/?25300

[avrs-admin]

Eric Weddington Tue 13 Jan 2009 10:16:38 AM CET

Patches welcome, as doing this change requires modifying a lot of header files.

[avrs-admin]

Frédéric Nadeau Thu 26 Mar 2009 09:23:03 PM CET

I'm including 2 files: io.patch xml.patch

added pin definition added an INTERRUPT_num

TODO: Some device have no pin definition since XML files lack information. Some device like ATmega1280/1281 use the same io file, however the 1281 has less pin, should consider using the already existing ATmegaxx1 and ATmegaxx0 define Some device may contain errors since the XML are crappy

(file #17813, file #17814)

[avrs-admin]

Frédéric Nadeau Mon 30 Mar 2009 08:41:29 PM CEST

I have attaced a newly generated patch against HEAD

vector now have number in the following format: XXXXX_vect_num           4 XXXXX_vect              _VECTOR(4)

pin definition looks like: #define XX_DDR  DDRD #define XX_PORT PORTD #define XX_PIN  PIND #define XX_BIT  5

Patch to the xml folder is also included. This has helped to generate the new io header and I don't beleived it is used for anything else.

(file #17837)

[avrs-admin]

Frédéric Nadeau Fri 17 Apr 2009 07:53:35 PM CEST

Hi,

Latest patch against HEAD, Solve:

• Duplicate issue
• Now Output Compare that are Inverted are named OCXY_N: #define OC1D_N_DDR  DDRB #define OC1D_N_PORT PORTB #define OC1D_N_PIN  PINB #define OC1D_N_BIT  4

Comments are welcome.

(file #17941)

[avrs-admin]

Frédéric Nadeau Fri 17 Apr 2009 07:58:26 PM CEST

As a side note...

Even if the patch include modification to the script, anyone attempting to regenerate the patch using the script will fail to do so since I modified some AVR Studio XML file that were bogus.

Just so it does not confuse anyone.

[avrs-admin]

Frédéric Nadeau Tue 28 Apr 2009 03:06:53 PM CEST

I reworked the header for ATmega640/1280/2560/641/1281/2561 so that when a 64pin device is use, missing pin definition are not declared. It use the same mechanism that was already in place in that file.

This patch also fix issue where USART Rx 0 and XCLK where missing the '0'.

This patch against HEAD and not against the previously committed patch.

(file #18037)

[avrs-admin]

Grygoriy Fuchedzhy Sat 19 Dec 2009 11:22:40 AM CET

Hi, I'm successfully using your patch, thanks for your work! When do you think this can be included in some release?