Fix few bugs on the i386 target

[pwissenlit]

This pull request aims at fixing two bugs when dealing with x86 targets.

The first one is related to the gdbstub complaining about the fact that the machine doesn't provide any CPU (as illustrated in this issue: https://github.com/avatartwo/avatar2/issues/110#issuecomment-1196950972). The fix involves plugging the CPU into the QOM hierarchy with qdev_realize. Please note that a hardcoded apic-id is used at the moment which could prevent users from creating multiple CPUs on the target. However, I don't know if avatar-qemu could allow such possibility in any cases so I haven't dwelt on this issue.

The second bug is related to a wrong stack alignment when pushing and popping 32 bit values. This impedes the correct functioning of these instructions by preventing the value to be written in memory. As qemu uses the CPU flag HF_SS32_MASK to retrieve the stack pointer size that is needed, the fix is to simply set it when initializing the CPU.

// target/i386/tcg/translate.c

#define SS32(S)   (((S)->flags & HF_SS32_MASK) != 0)
// [...]
/* Select the size of the stack pointer.  */
static inline MemOp mo_stacksize(DisasContext *s)
{
    return CODE64(s) ? MO_64 : SS32(s) ? MO_32 : MO_16;
}

For the record, a third bug still remains on this target: the provided entry_address is not taken into account by the CPU and the execution instead starts from the beginning of the first ROM memory. I tried to dig into that but without much success. Since this is an issue that can easily be circumvented directly from the python script, I've put it aside for now.