marss

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pkufergus

Fixed two bugs regarding the Intel TSX specification: XABORT was not working. XTEST returned the wrong return code.

smetzlaff

Android-x86 on Marss - Pipeline deadlocked

16

I ran into an issue of pipeline deadlock when I was running my Android-x86 image on Marss. The way to reproduce the error is as follows. Here is my marss...

schfan

Use MARSS's cache module separately

2

I'm wondering if the cache module can be used separately on some other platforms (if those platforms support an external module. e.g. Synposis Processor Designer, etc.) or it is only...

amiralish

I am faced with a problem that the Marss86 is not working properly with Xen hypervisor. I have tried to setup Xen on the customized disk, which is based on...

Jeongseob

There are many cases where request to memory subsystem should not be cached in L1/L2/L3 caches. Current MARSS does not provide this feature. Add an option in MemoryRequest to enable/disable...

avadhpatel

Front end delay are fixed value

furatafram

Modify the cache structure and replacement algorithm

1

Can we modify the cache structure and replacement policy to test some attack defense techniques?

Pavitra07