PMU counter overflow on Arm

[KurtWu10]

issue

Arm CPUs before Cortex-A510 (or Armv9 in general) only have 32-bit counters for the PMU. Some events like the number executed instructions can easily overflow the counter. However, currently there seems to be no way in the benchmark PD to tell whether a counter has overflowed.

proposals

Before/Without handling overflow IRQ in the kernel, in the benchmark PD,

EDIT: (after discussion with Terry, now I know that the commit does handle the counter overflow via IRQ, but the kernel change should enable counter overflow IRQ as well)

proposal 1

Use the CHAIN (0x1E) PMU event to repurpose a pair of adjacent 32-bit counters as a 64-bit counter. This event is available on both Cortex-A53 and Cortex-A55.

proposal 2

(flag an overflowed counter)

• when starting the benchmark and resetting the counters, it should also clear the overflow flag status register PMOVSCLR_EL0
• then, after completing the benchmark and before reporting the counter values, the PD should first read from the PMOVSCLR_EL0 register to identify which counter has overflowed.