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[Feature Request]: rock 5b hdmirx feature support
Which feature would you like to have?
According to the mainline, HDmirx for the RK3588 has been implemented in kernel 6.15. https://gitlab.collabora.com/hardware-enablement/rockchip-3588/notes-for-rockchip-3588/-/blob/main/mainline-status.md
I tried to build the latest Edge image myself and enabled the HDmirx overlays. I found the following kernel error:
rock-5b:~:# dmesg | grep -Ei "err|fail|hdmi"
rock-5b:~:# dmesg | grep -Ei "err|fail|hdmi"
[ 0.000000] OF: reserved mem: initialized node hdmi-receiver-cma, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x00000000e14c0000..0x00000000eb4bffff (163840 KiB) nomap non-reusable hdmi-receiver-cma
[ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
[ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
[ 0.000000] GIC: enabling workaround for ITS: Rockchip erratum RK3588001
[ 0.000000] ITS@0x00000000fe640000: allocated 32768 Interrupt Collections @100160000 (flat, esz 2, psz 64K, shr 0)
[ 0.000000] GIC: enabling workaround for ITS: Rockchip erratum RK3588001
[ 0.000000] ITS@0x00000000fe660000: allocated 32768 Interrupt Collections @100190000 (flat, esz 2, psz 64K, shr 0)
[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
[ 0.070816] /vop@fdd90000: Fixed dependency cycle(s) with /hdmi@fde80000
[ 0.070852] /hdmi@fde80000: Fixed dependency cycle(s) with /vop@fdd90000
[ 0.074141] /pcie@fe190000: Fixed dependency cycle(s) with /pcie@fe190000/legacy-interrupt-controller
[ 0.091411] /vop@fdd90000: Fixed dependency cycle(s) with /hdmi@fdea0000
[ 0.091452] /hdmi@fdea0000: Fixed dependency cycle(s) with /vop@fdd90000
[ 0.092357] /pcie@fe150000: Fixed dependency cycle(s) with /pcie@fe150000/legacy-interrupt-controller
[ 0.092834] /pcie@fe170000: Fixed dependency cycle(s) with /pcie@fe170000/legacy-interrupt-controller
[ 0.093713] /hdmi@fde80000: Fixed dependency cycle(s) with /hdmi0-con
[ 0.093745] /hdmi0-con: Fixed dependency cycle(s) with /hdmi@fde80000
[ 0.093858] /hdmi@fdea0000: Fixed dependency cycle(s) with /hdmi1-con
[ 0.093896] /hdmi1-con: Fixed dependency cycle(s) with /hdmi@fdea0000
[ 0.769994] kvm [1]: vgic interrupt IRQ18
[ 1.690414] sdhci: Copyright(c) Pierre Ossman
[ 1.781936] GPT: Use GNU Parted to correct GPT errors.
[ 1.797872] rockchip-pm-domain fd8d8000.power-management:power-controller: Failed to create device link (0x180) with supplier spi2.0 for /power-management@fd8d8000/power-controller/power-domain@12
[ 2.264965] mmc2: Failed to initialize a non-removable card
[ 2.663678] pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: failed to assign
[ 2.663702] pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: failed to assign
[ 2.669077] dwhdmiqp-rockchip fde80000.hdmi: registered DesignWare HDMI QP I2C bus driver
[ 2.669177] rockchip-drm display-subsystem: bound fde80000.hdmi (ops rockchip_drm_fini [rockchipdrm])
[ 2.669810] dwhdmiqp-rockchip fdea0000.hdmi: registered DesignWare HDMI QP I2C bus driver
[ 2.669887] rockchip-drm display-subsystem: bound fdea0000.hdmi (ops rockchip_drm_fini [rockchipdrm])
[ 5.840559] snps_hdmirx fdee0000.hdmi_receiver: assigned reserved memory node hdmi-receiver-cma
[ 6.095956] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_controller_init wait timer base lock failed
[ 6.120058] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.143991] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.167927] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.191931] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.216259] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.239905] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.263944] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.287909] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.311912] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
[ 6.339909] snps_hdmirx fdee0000.hdmi_receiver: hdmirx_phy_register_write wait cr write done failed
rock-5b:~:# uname -r
6.16.2-edge-rockchip64
rock-5b:~:# cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/fd8a0000.gpio, gpio0:
gpio-4 ( |cd ) in hi IRQ ACTIVE LOW
gpio-7 ( |interrupt ) in hi IRQ
gpio-8 ( |interrupt ) in hi IRQ
gpio-15 ( |blue:status ) out lo
gpiochip1: GPIOs 32-63, parent: platform/fec20000.gpio, gpio1:
gpio-36 ( |regulator-vcc3v3-pci) out hi
gpio-54 ( |hpd ) in lo IRQ ACTIVE LOW
gpio-58 ( |regulator-vcc3v3-pci) out hi
gpio-61 ( |Headphone detection ) in lo IRQ
gpiochip2: GPIOs 64-95, parent: platform/fec30000.gpio, gpio2:
gpiochip3: GPIOs 96-127, parent: platform/fec40000.gpio, gpio3:
gpio-104 ( |reset ) out hi
gpio-125 ( |shutdown ) out hi
gpiochip4: GPIOs 128-159, parent: platform/fec50000.gpio, gpio4:
gpio-130 ( |shutdown ) out hi
gpio-133 ( |reset ) out hi
gpio-136 ( |regulator-vcc5v0-hos) out hi
gpio-142 ( |reset ) out hi
rock-5b:~:# dtc -I fs -O dts /proc/device-tree -q | grep -A 30 -E "hdmi-|hdmi_|hdmirx|hdmiin|hdmi-in"
compatible = "hdmi-connector";
port {
endpoint {
remote-endpoint = <0x134>;
phandle = <0x116>;
};
};
};
pwm@febd0030 {
pinctrl-names = "default";
pinctrl-0 = <0xd8>;
clock-names = "pwm\0pclk";
clocks = <0x21 0x4c 0x21 0x4b>;
#pwm-cells = <0x03>;
compatible = "rockchip,rk3588-pwm\0rockchip,rk3328-pwm";
status = "disabled";
reg = <0x00 0xfebd0030 0x00 0x10>;
phandle = <0x1a3>;
};
qos@fdf66600 {
compatible = "rockchip,rk3588-qos\0syscon";
reg = <0x00 0xfdf66600 0x00 0x20>;
phandle = <0x4a>;
};
serial@febb0000 {
reg-io-width = <0x04>;
--
hdmirx {
hdmirx-5v-detection {
rockchip,pins = <0x01 0x16 0x00 0x101>;
phandle = <0x11d>;
};
};
uart1 {
uart1m0-ctsn {
rockchip,pins = <0x02 0x11 0x0a 0x101>;
phandle = <0x345>;
};
uart1m1-xfer {
rockchip,pins = <0x01 0x0f 0x0a 0x108 0x01 0x0e 0x0a 0x108>;
phandle = <0xca>;
};
uart1m0-xfer {
rockchip,pins = <0x02 0x0e 0x0a 0x108 0x02 0x0f 0x0a 0x108>;
phandle = <0x344>;
};
uart1m2-rtsn {
rockchip,pins = <0x00 0x17 0x0a 0x101>;
phandle = <0x343>;
};
uart1m1-rtsn {
rockchip,pins = <0x01 0x1e 0x0a 0x101>;
phandle = <0x340>;
--
hdmi-debug6 {
rockchip,pins = <0x01 0x00 0x07 0x101>;
phandle = <0x247>;
};
hdmim2-tx0-scl {
rockchip,pins = <0x03 0x17 0x05 0x104>;
phandle = <0x23c>;
};
hdmim2-tx0-sda {
rockchip,pins = <0x03 0x18 0x05 0x105>;
phandle = <0x23d>;
};
hdmi-debug4 {
rockchip,pins = <0x01 0x0b 0x07 0x101>;
phandle = <0x245>;
};
hdmim0-tx1-cec {
rockchip,pins = <0x02 0x14 0x04 0x101>;
phandle = <0x111>;
};
hdmim0-tx1-scl {
rockchip,pins = <0x02 0x0d 0x04 0x106>;
phandle = <0x248>;
};
hdmim0-tx1-sda {
rockchip,pins = <0x02 0x0c 0x04 0x105>;
phandle = <0x249>;
};
hdmi-debug2 {
rockchip,pins = <0x01 0x09 0x07 0x101>;
phandle = <0x243>;
};
hdmim0-tx1-hpd {
rockchip,pins = <0x01 0x06 0x05 0x101>;
phandle = <0x112>;
};
hdmim2-tx1-cec {
rockchip,pins = <0x03 0x14 0x05 0x101>;
phandle = <0x23e>;
};
hdmi-debug0 {
rockchip,pins = <0x01 0x07 0x07 0x101>;
phandle = <0x241>;
};
hdmim2-tx1-scl {
rockchip,pins = <0x01 0x04 0x05 0x104>;
phandle = <0x23f>;
};
hdmim2-tx1-sda {
rockchip,pins = <0x01 0x03 0x05 0x105>;
phandle = <0x240>;
};
hdmim1-tx0-cec {
rockchip,pins = <0x00 0x19 0x0d 0x101>;
phandle = <0x232>;
};
hdmim1-tx0-scl {
rockchip,pins = <0x00 0x1d 0x0b 0x104>;
phandle = <0x234>;
};
hdmim1-tx0-sda {
rockchip,pins = <0x00 0x1c 0x0b 0x105>;
phandle = <0x235>;
};
hdmim1-tx0-hpd {
--
hdmi-debug5 {
rockchip,pins = <0x01 0x0c 0x07 0x101>;
phandle = <0x246>;
};
hdmi-debug3 {
rockchip,pins = <0x01 0x0a 0x07 0x101>;
phandle = <0x244>;
};
hdmim1-tx1-cec {
rockchip,pins = <0x00 0x1a 0x0d 0x101>;
phandle = <0x236>;
};
hdmi-debug1 {
rockchip,pins = <0x01 0x08 0x07 0x101>;
phandle = <0x242>;
};
hdmim1-tx1-scl {
rockchip,pins = <0x03 0x16 0x05 0x104>;
phandle = <0x113>;
};
hdmim1-tx1-sda {
rockchip,pins = <0x03 0x15 0x05 0x105>;
phandle = <0x114>;
};
hdmim1-tx1-hpd {
rockchip,pins = <0x03 0x0f 0x05 0x101>;
phandle = <0x237>;
};
hdmim1-rx-hpdin {
rockchip,pins = <0x03 0x1c 0x05 0x101>;
phandle = <0x11a>;
};
hdmim0-rx-cec {
rockchip,pins = <0x04 0x0d 0x05 0x101>;
phandle = <0x22e>;
};
};
--
compatible = "rockchip,rk3588-dw-hdmi-qp";
status = "okay";
rockchip,grf = <0x6d>;
interrupt-names = "avp\0cec\0earc\0main\0hpd";
phys = <0x6b>;
reg = <0x00 0xfdea0000 0x00 0x20000>;
phandle = <0x10d>;
reset-names = "ref\0hdp";
rockchip,vo-grf = <0x6f>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
phandle = <0x387>;
endpoint {
remote-endpoint = <0x115>;
phandle = <0x72>;
};
};
port@1 {
reg = <0x01>;
phandle = <0x388>;
endpoint {
remote-endpoint = <0x116>;
phandle = <0x134>;
--
compatible = "hdmi-connector";
port {
endpoint {
remote-endpoint = <0x133>;
phandle = <0x7c>;
};
};
};
qos@fdf40200 {
compatible = "rockchip,rk3588-qos\0syscon";
reg = <0x00 0xfdf40200 0x00 0x20>;
phandle = <0x5d>;
};
usb@fc400000 {
power-domains = <0x22 0x1f>;
snps,dis_enblslpm_quirk;
phy-names = "usb2-phy\0usb3-phy";
clock-names = "ref_clk\0suspend_clk\0bus_clk";
snps,dis-u2-freeclk-exists-quirk;
phy_type = "utmi_wide";
resets = <0x21 0x153>;
interrupts = <0x00 0xdd 0x04 0x00>;
clocks = <0x21 0x197 0x21 0x196 0x21 0x195>;
compatible = "rockchip,rk3588-dwc3\0snps,dwc3";
snps,dis-del-phy-power-chg-quirk;
status = "okay";
phys = <0x10f 0x110 0x04>;
--
compatible = "rockchip,rk3588-dw-hdmi-qp";
status = "okay";
rockchip,grf = <0x6d>;
interrupt-names = "avp\0cec\0earc\0main\0hpd";
phys = <0x6a>;
reg = <0x00 0xfde80000 0x00 0x20000>;
phandle = <0x1d>;
reset-names = "ref\0hdp";
rockchip,vo-grf = <0x6f>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
phandle = <0x166>;
endpoint {
remote-endpoint = <0x7b>;
phandle = <0x71>;
};
};
port@1 {
reg = <0x01>;
phandle = <0x167>;
endpoint {
remote-endpoint = <0x7c>;
phandle = <0x133>;
--
hdmi_debug4 = "/pinctrl/hdmi/hdmi-debug4";
i2c0m2_xfer = "/pinctrl/i2c0/i2c0m2-xfer";
gmac0_rgmii_bus = "/pinctrl/gmac0/gmac0-rgmii-bus";
sdmmc_clk = "/pinctrl/sdmmc/sdmmc-clk";
spi0m3_cs0 = "/pinctrl/spi0/spi0m3-cs0";
pcie3x2 = "/pcie@fe160000";
i2s2m1_mclk = "/pinctrl/i2s2/i2s2m1-mclk";
mipim0_camera3_clk = "/pinctrl/mipi/mipim0-camera3-clk";
pwm14 = "/pwm@febf0020";
pcie30x1m1_1_clkreqn = "/pinctrl/pcie30x1/pcie30x1m1-1-clkreqn";
pcie30x2m1_perstn = "/pinctrl/pcie30x2/pcie30x2m1-perstn";
can2m1_pins = "/pinctrl/can2/can2m1-pins";
pcie2x1l1 = "/pcie@fe180000";
qos_rkvenc0_m2wo = "/qos@fdf60400";
pwm3m2_pins = "/pinctrl/pwm3/pwm3m2-pins";
l2_cache_b2 = "/cpus/l2-cache-b2";
pwm0m1_pins = "/pinctrl/pwm0/pwm0m1-pins";
i2s3_sdo = "/pinctrl/i2s3/i2s3-sdo";
thermal_zones = "/thermal-zones";
hdmim2_rx_scl = "/pinctrl/hdmi/hdmim2-rx-scl";
hdmim2_rx_sda = "/pinctrl/hdmi/hdmim2-rx-sda";
uart9m0_rtsn = "/pinctrl/uart9/uart9m0-rtsn";
spi1m2_cs0 = "/pinctrl/spi1/spi1m2-cs0";
pcie2x1l1_intc = "/pcie@fe180000/legacy-interrupt-controller";
spdif1m1_tx = "/pinctrl/spdif1/spdif1m1-tx";
littlecore_alert = "/thermal-zones/littlecore-thermal/trips/littlecore-alert";
qos_iep = "/qos@fdf66000";
pcfg_pull_none_drv_level_3 = "/pinctrl/pcfg-pull-none-drv-level-3";
spi3m2_cs1 = "/pinctrl/spi3/spi3m2-cs1";
uart4m2_xfer = "/pinctrl/uart4/uart4m2-xfer";
vp1 = "/vop@fdd90000/ports/port@1";
--
hdmi_receiver_cma = "/reserved-memory/hdmi-receiver-cma";
spi2 = "/spi@feb20000";
uart2_rtsn = "/pinctrl/uart2/uart2-rtsn";
spi4m1_cs1 = "/pinctrl/spi4/spi4m1-cs1";
pcfg_pull_up_drv_level_15 = "/pinctrl/pcfg-pull-up-drv-level-15";
vo1_grf = "/syscon@fd5a8000";
i2c4m3_xfer = "/pinctrl/i2c4/i2c4m3-xfer";
gpio0 = "/pinctrl/gpio@fd8a0000";
saradc = "/adc@fec10000";
i2s1m0_sdi3 = "/pinctrl/i2s1/i2s1m0-sdi3";
i2c1m2_xfer = "/pinctrl/i2c1/i2c1m2-xfer";
emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
dsi1 = "/dsi@fde30000";
pcie30x1m1_0_waken = "/pinctrl/pcie30x1/pcie30x1m1-0-waken";
qos_isp0_mwo = "/qos@fdf40500";
pmu_pins = "/pinctrl/pmu/pmu-pins";
gmac0_miim = "/pinctrl/gmac0/gmac0-miim";
spi3m0_cs0 = "/pinctrl/spi3/spi3m0-cs0";
avdd_1v2_s0 = "/spi@feb20000/pmic@0/regulators/pldo-reg3";
pcie30x2m2_perstn = "/pinctrl/pcie30x2/pcie30x2m2-perstn";
pwm7m3_pins = "/pinctrl/pwm7/pwm7m3-pins";
hdmi1 = "/hdmi@fdea0000";
crypto = "/crypto@fe370000";
dfi = "/dfi@fe060000";
can0m0_pins = "/pinctrl/can0/can0m0-pins";
pcfg_pull_up_drv_level_2 = "/pinctrl/pcfg-pull-up-drv-level-2";
pinctrl = "/pinctrl";
pcfg_pull_down_drv_level_6 = "/pinctrl/pcfg-pull-down-drv-level-6";
dp0m0_pins = "/pinctrl/dp0/dp0m0-pins";
i2s0_sdo3 = "/pinctrl/i2s0/i2s0-sdo3";
pwm1m1_pins = "/pinctrl/pwm1/pwm1m1-pins";
--
hdmi_debug2 = "/pinctrl/hdmi/hdmi-debug2";
pdm0m0_clk = "/pinctrl/pdm0/pdm0m0-clk";
gmac0_ppsclk = "/pinctrl/gmac0/gmac0-ppsclk";
i2c8m4_xfer = "/pinctrl/i2c8/i2c8m4-xfer";
i2c5m3_xfer = "/pinctrl/i2c5/i2c5m3-xfer";
gmac0 = "/ethernet@fe1b0000";
i2c2m2_xfer = "/pinctrl/i2c2/i2c2m2-xfer";
pwm12 = "/pwm@febf0000";
emmc_cmd = "/pinctrl/emmc/emmc-cmd";
i2s1_8ch = "/i2s@fe480000";
uart4_ctsn = "/pinctrl/uart4/uart4-ctsn";
pcfg_pull_none = "/pinctrl/pcfg-pull-none";
i2s1m0_mclk = "/pinctrl/i2s1/i2s1m0-mclk";
hdmi0_in_vp0 = "/hdmi@fde80000/ports/port@0/endpoint";
l2_cache_b0 = "/cpus/l2-cache-b0";
pcie30x2m3_perstn = "/pinctrl/pcie30x2/pcie30x2m3-perstn";
can1m0_pins = "/pinctrl/can1/can1m0-pins";
spi0m3_pins = "/pinctrl/spi0/spi0m3-pins";
pwm5m2_pins = "/pinctrl/pwm5/pwm5m2-pins";
i2s0_lrck = "/pinctrl/i2s0/i2s0-lrck";
clk32k_out0 = "/pinctrl/clk32k/clk32k-out0";
dp1m0_pins = "/pinctrl/dp1/dp1m0-pins";
pwm2m1_pins = "/pinctrl/pwm2/pwm2m1-pins";
eth1_pins = "/pinctrl/eth1/eth1-pins";
pd_gpu = "/power-management@fd8d8000/power-controller/power-domain@12";
pcfg_pull_none_drv_level_1 = "/pinctrl/pcfg-pull-none-drv-level-1";
pdm1m1_sdi3 = "/pinctrl/pdm1/pdm1m1-sdi3";
package_fan0 = "/thermal-zones/package-thermal/trips/package-fan0";
pcie30x2m0_waken = "/pinctrl/pcie30x2/pcie30x2m0-waken";
hdmim1_tx1_cec = "/pinctrl/hdmi/hdmim1-tx1-cec";
pcie2_2_rst = "/pinctrl/pcie2/pcie2-2-rst";
--
hdmi_debug0 = "/pinctrl/hdmi/hdmi-debug0";
hdmim1_tx1_hpd = "/pinctrl/hdmi/hdmim1-tx1-hpd";
qos_isp0_mro = "/qos@fdf40400";
spi0m2_cs1 = "/pinctrl/spi0/spi0m2-cs1";
vdd_gpu_s0 = "/spi@feb20000/pmic@0/regulators/dcdc-reg1";
pcie30x1m1_0_perstn = "/pinctrl/pcie30x1/pcie30x1m1-0-perstn";
tsadc_shut = "/pinctrl/tsadc/tsadc-shut";
pwm10 = "/pwm@febe0020";
vepu121_3_mmu = "/iommu@fdbac800";
i2c7m3_xfer = "/pinctrl/i2c7/i2c7m3-xfer";
cpub0_leakage = "/efuse@fecc0000/cpu-leakage@17";
i2c4m2_xfer = "/pinctrl/i2c4/i2c4m2-xfer";
pcie30phy_pins = "/pinctrl/pcie30phy/pcie30phy-pins";
pcfg_pull_none_drv_level_14 = "/pinctrl/pcfg-pull-none-drv-level-14";
i2c1m1_xfer = "/pinctrl/i2c1/i2c1m1-xfer";
its1 = "/interrupt-controller@fe600000/msi-controller@fe660000";
hdmi_receiver = "/hdmi_receiver@fdee0000";
cpu_b3 = "/cpus/cpu@700";
spi1m1_cs1 = "/pinctrl/spi1/spi1m1-cs1";
pwm7m2_pins = "/pinctrl/pwm7/pwm7m2-pins";
pdm1m1_sdi1 = "/pinctrl/pdm1/pdm1m1-sdi1";
pwm4m1_pins = "/pinctrl/pwm4/pwm4m1-pins";
gpu_crit = "/thermal-zones/gpu-thermal/trips/gpu-crit";
pcie30x4_button_rstn = "/pinctrl/pcie30x4/pcie30x4-button-rstn";
uart4 = "/serial@feb70000";
pwm1m0_pins = "/pinctrl/pwm1/pwm1m0-pins";
spi0m0_cs0 = "/pinctrl/spi0/spi0m0-cs0";
pldo6_s3 = "/spi@feb20000/pmic@0/regulators/pldo-reg6";
mipim1_camera2_clk = "/pinctrl/mipi/mipim1-camera2-clk";
mipim0_camera0_clk = "/pinctrl/mipi/mipim0-camera0-clk";
pcfg_pull_up_drv_level_9 = "/pinctrl/pcfg-pull-up-drv-level-9";
dmac2 = "/dma-controller@fed10000";
pdm0m0_sdi3 = "/pinctrl/pdm0/pdm0m0-sdi3";
qos_gpu_m2 = "/qos@fdf35400";
i2s0_sdi3 = "/pinctrl/i2s0/i2s0-sdi3";
cluster0_opp_table = "/opp-table-cluster0";
spi2m0_cs1 = "/pinctrl/spi2/spi2m0-cs1";
otp_id = "/efuse@fecc0000/id@7";
uart5m1_xfer = "/pinctrl/uart5/uart5m1-xfer";
uart9m1_ctsn = "/pinctrl/uart9/uart9m1-ctsn";
qos_rga3_0 = "/qos@fdf67000";
uart2m0_xfer = "/pinctrl/uart2/uart2m0-xfer";
uart6m0_ctsn = "/pinctrl/uart6/uart6m0-ctsn";
npu_pins = "/pinctrl/npu/npu-pins";
pcfg_pull_up_drv_level_11 = "/pinctrl/pcfg-pull-up-drv-level-11";
spdif_tx3 = "/spdif-tx@fdde0000";
xin32k = "/clock-2";
--
qos_hdmirx = "/qos@fdf81200";
i2c2m1_xfer = "/pinctrl/i2c2/i2c2m1-xfer";
vdd_0v75_s0 = "/spi@feb20000/pmic@0/regulators/nldo-reg5";
mipim0_camera4_clk = "/pinctrl/mipi/mipim0-camera4-clk";
gmac1_txer = "/pinctrl/gmac1/gmac1-txer";
uart3_ctsn = "/pinctrl/uart3/uart3-ctsn";
es8316_p0_0 = "/i2c@fec90000/audio-codec@11/port/endpoint";
edp0 = "/edp@fdec0000";
package_crit = "/thermal-zones/package-thermal/trips/package-crit";
power = "/power-management@fd8d8000/power-controller";
spi3m3_pins = "/pinctrl/spi3/spi3m3-pins";
pwm8m2_pins = "/pinctrl/pwm8/pwm8m2-pins";
spi0m2_pins = "/pinctrl/spi0/spi0m2-pins";
pwm5m1_pins = "/pinctrl/pwm5/pwm5m1-pins";
vcc3v3_pcie2x1l2 = "/regulator-vcc3v3-pcie2x1l2";
vcc_3v3_s0 = "/spi@feb20000/pmic@0/regulators/pldo-reg4";
dsi0_out = "/dsi@fde20000/ports/port@1";
pwm2m0_pins = "/pinctrl/pwm2/pwm2m0-pins";
i2s1m1_sdo2 = "/pinctrl/i2s1/i2s1m1-sdo2";
pcfg_pull_down_drv_level_13 = "/pinctrl/pcfg-pull-down-drv-level-13";
eth0_pins = "/pinctrl/eth0/eth0-pins";
pwm3 = "/pwm@fd8b0030";
pdm1m0_sdi3 = "/pinctrl/pdm1/pdm1m0-sdi3";
gmac0_tx_bus2 = "/pinctrl/gmac0/gmac0-tx-bus2";
sata2 = "/sata@fe230000";
uart9m2_xfer = "/pinctrl/uart9/uart9m2-xfer";
spi3m3_cs1 = "/pinctrl/spi3/spi3m3-cs1";
l2_cache_l1 = "/cpus/l2-cache-l1";
pcfg_pull_none_drv_level_8 = "/pinctrl/pcfg-pull-none-drv-level-8";
uart6m1_xfer = "/pinctrl/uart6/uart6m1-xfer";
pwm11m3_pins = "/pinctrl/pwm11/pwm11m3-pins";
--
hdmi_debug5 = "/pinctrl/hdmi/hdmi-debug5";
uart1m1_rtsn = "/pinctrl/uart1/uart1m1-rtsn";
qos_isp1_mro = "/qos@fdf41100";
ddrphych3_pins = "/pinctrl/ddrphych3/ddrphych3-pins";
spi0m3_cs1 = "/pinctrl/spi0/spi0m3-cs1";
qos_rkvenc0_m1ro = "/qos@fdf60200";
qos_jpeg_dec = "/qos@fdf66200";
qos_npu0_mwr = "/qos@fdf72000";
rk806_dvs1_null = "/spi@feb20000/pmic@0/dvs1-null-pins";
pwm15 = "/pwm@febf0030";
vop_mmu = "/iommu@fdd97e00";
pcie2x1l2 = "/pcie@fe190000";
i2c6m1_xfer = "/pinctrl/i2c6/i2c6m1-xfer";
l2_cache_b3 = "/cpus/l2-cache-b3";
i2c3m0_xfer = "/pinctrl/i2c3/i2c3m0-xfer";
pcie30x1m2_1_perstn = "/pinctrl/pcie30x1/pcie30x1m2-1-perstn";
vcc_1v1_nldo_s3 = "/regulator-vcc-1v1-nldo-s3";
spi1m2_cs1 = "/pinctrl/spi1/spi1m2-cs1";
spi4m2_pins = "/pinctrl/spi4/spi4m2-pins";
pcfg_pull_none_drv_level_4 = "/pinctrl/pcfg-pull-none-drv-level-4";
pwm9m1_pins = "/pinctrl/pwm9/pwm9m1-pins";
vp2 = "/vop@fdd90000/ports/port@2";
spi1m1_pins = "/pinctrl/spi1/spi1m1-pins";
pwm6m0_pins = "/pinctrl/pwm6/pwm6m0-pins";
gmac0_mtl_tx_setup = "/ethernet@fe1b0000/tx-queues-config";
cpu_l2 = "/cpus/cpu@200";
uart9 = "/serial@febc0000";
spi0m1_cs0 = "/pinctrl/spi0/spi0m1-cs0";
usbdpphy0_grf = "/syscon@fd5c8000";
mipim1_camera3_clk = "/pinctrl/mipi/mipim1-camera3-clk";
mipim0_camera1_clk = "/pinctrl/mipi/mipim0-camera1-clk";
--
hdmi_debug3 = "/pinctrl/hdmi/hdmi-debug3";
mcum1_pins = "/pinctrl/mcu/mcum1-pins";
pcie30x4m3_perstn = "/pinctrl/pcie30x4/pcie30x4m3-perstn";
pwm10m1_pins = "/pinctrl/pwm10/pwm10m1-pins";
edp1_out = "/edp@fded0000/ports/port@1";
usb_host0_ehci = "/usb@fc800000";
gmac1 = "/ethernet@fe1c0000";
i2s10_8ch = "/i2s@fde00000";
hdmi1_in = "/hdmi@fdea0000/ports/port@0";
usb2phy1_grf = "/syscon@fd5d4000";
pdm0m0_clk1 = "/pinctrl/pdm0/pdm0m0-clk1";
pwm13 = "/pwm@febf0010";
pcie2x1l0 = "/pcie@fe170000";
hdmim0_tx1_cec = "/pinctrl/hdmi/hdmim0-tx1-cec";
l2_cache_b1 = "/cpus/l2-cache-b1";
pcie3x4_ep = "/pcie-ep@fe150000";
cif_dvp_bus8 = "/pinctrl/cif/cif-dvp-bus8";
qos_rga2_mro = "/qos@fdf66c00";
i2c8m1_xfer = "/pinctrl/i2c8/i2c8m1-xfer";
vdd_ddr_s0 = "/spi@feb20000/pmic@0/regulators/dcdc-reg5";
qos_sdmmc = "/qos@fdf3d800";
clk32k_out1 = "/pinctrl/clk32k/clk32k-out1";
i2c5m0_xfer = "/pinctrl/i2c5/i2c5m0-xfer";
cif_dvp_clk = "/pinctrl/cif/cif-dvp-clk";
pcfg_pull_none_drv_level_2 = "/pinctrl/pcfg-pull-none-drv-level-2";
spi3m2_cs0 = "/pinctrl/spi3/spi3m2-cs0";
vp0 = "/vop@fdd90000/ports/port@0";
package_fan1 = "/thermal-zones/package-thermal/trips/package-fan1";
jtagm2_pins = "/pinctrl/jtag/jtagm2-pins";
cpu_l0 = "/cpus/cpu@0";
uart7 = "/serial@feba0000";
--
hdmi_debug1 = "/pinctrl/hdmi/hdmi-debug1";
qos_mcu_npu = "/qos@fdf72400";
auddsm_pins = "/pinctrl/auddsm/auddsm-pins";
i2s3_lrck = "/pinctrl/i2s3/i2s3-lrck";
pcfg_pull_none_drv_level_2_smt = "/pinctrl/pcfg-pull-none-drv-level-2-smt";
pwm15m2_pins = "/pinctrl/pwm15/pwm15m2-pins";
pipe_phy1_grf = "/syscon@fd5c0000";
pwm12m1_pins = "/pinctrl/pwm12/pwm12m1-pins";
pwm11 = "/pwm@febe0030";
pcie20x1m1_clkreqn = "/pinctrl/pcie20x1/pcie20x1m1-clkreqn";
i2s7_8ch = "/i2s@fddf8000";
uart5m1_rtsn = "/pinctrl/uart5/uart5m1-rtsn";
hdmi0_out = "/hdmi@fde80000/ports/port@1";
pcfg_pull_none_drv_level_15 = "/pinctrl/pcfg-pull-none-drv-level-15";
usb_host1_xhci = "/usb@fc400000";
pcie3x2_intc = "/pcie@fe160000/legacy-interrupt-controller";
av1d = "/video-codec@fdc70000";
uart1m2_ctsn = "/pinctrl/uart1/uart1m2-ctsn";
sdiom1_pins = "/pinctrl/sdio/sdiom1-pins";
pcfg_pull_none_drv_level_0 = "/pinctrl/pcfg-pull-none-drv-level-0";
npu_thermal = "/thermal-zones/npu-thermal";
i2c7m0_xfer = "/pinctrl/i2c7/i2c7m0-xfer";
pdm1m1_sdi2 = "/pinctrl/pdm1/pdm1m1-sdi2";
cpu_pins = "/pinctrl/cpu/cpu-pins";
uart5 = "/serial@feb80000";
spi0m0_cs1 = "/pinctrl/spi0/spi0m0-cs1";
sdio = "/mmc@fe2d0000";
pcie30x2m2_waken = "/pinctrl/pcie30x2/pcie30x2m2-waken";
spdif1m2_tx = "/pinctrl/spdif1/spdif1m2-tx";
es8316 = "/i2c@fec90000/audio-codec@11";
qos_gpu_m3 = "/qos@fdf35600";
--
hdmirx_hpd = "/pinctrl/hdmirx/hdmirx-5v-detection";
spi4m2_cs0 = "/pinctrl/spi4/spi4m2-cs0";
fan = "/pwm-fan";
cpu_b0 = "/cpus/cpu@400";
vccio_sd_s0 = "/spi@feb20000/pmic@0/regulators/pldo-reg5";
qos_rkvenc1_m2wo = "/qos@fdf61400";
gpio4 = "/pinctrl/gpio@fec50000";
hdmim0_rx_cec = "/pinctrl/hdmi/hdmim0-rx-cec";
pwm3m3_pins = "/pinctrl/pwm3/pwm3m3-pins";
mmu600_php = "/iommu@fcb00000";
pwm0m2_pins = "/pinctrl/pwm0/pwm0m2-pins";
pwm13m0_pins = "/pinctrl/pwm13/pwm13m0-pins";
bt656_pins = "/pinctrl/bt656/bt656-pins";
hdmi1_sound = "/hdmi1-sound";
uart9m1_rtsn = "/pinctrl/uart9/uart9m1-rtsn";
uart6m0_rtsn = "/pinctrl/uart6/uart6m0-rtsn";
pcie2x1l2_intc = "/pcie@fe190000/legacy-interrupt-controller";
gpu_thermal = "/thermal-zones/gpu-thermal";
hdmim1_tx0_cec = "/pinctrl/hdmi/hdmim1-tx0-cec";
uart1 = "/serial@feb40000";
pcfg_pull_up_drv_level_6 = "/pinctrl/pcfg-pull-up-drv-level-6";
qos_rkvdec0 = "/qos@fdf62000";
uart1m2_xfer = "/pinctrl/uart1/uart1m2-xfer";
pdm0m0_sdi0 = "/pinctrl/pdm0/pdm0m0-sdi0";
fspim2_pins = "/pinctrl/fspi/fspim2-pins";
i2s0_sdi0 = "/pinctrl/i2s0/i2s0-sdi0";
gpu_pins = "/pinctrl/gpu/gpu-pins";
i2s4_8ch = "/i2s@fddc0000";
spdif_tx0 = "/spdif-tx@fe4e0000";
hp_detect = "/pinctrl/sound/hp-detect";
i2s1m0_sdo3 = "/pinctrl/i2s1/i2s1m0-sdo3";
--
hdmi_debug6 = "/pinctrl/hdmi/hdmi-debug6";
pcie3x4 = "/pcie@fe150000";
can0m1_pins = "/pinctrl/can0/can0m1-pins";
pcfg_pull_none_drv_level_3_smt = "/pinctrl/pcfg-pull-none-drv-level-3-smt";
vpu121 = "/video-codec@fdb50000";
hdmim1_rx_cec = "/pinctrl/hdmi/hdmim1-rx-cec";
pipe_phy2_grf = "/syscon@fd5c4000";
dp0m1_pins = "/pinctrl/dp0/dp0m1-pins";
pwm1m2_pins = "/pinctrl/pwm1/pwm1m2-pins";
pwm14m0_pins = "/pinctrl/pwm14/pwm14m0-pins";
little_core_thermal = "/thermal-zones/littlecore-thermal";
i2s8_8ch = "/i2s@fddc8000";
hdptxphy0 = "/phy@fed60000";
pcie30x1_0_button_rstn = "/pinctrl/pcie30x1/pcie30x1-0-button-rstn";
gpu_alert = "/thermal-zones/gpu-thermal/trips/gpu-alert";
u2phy3_host = "/syscon@fd5dc000/usb2phy@c000/host-port";
hdmim0_rx_scl = "/pinctrl/hdmi/hdmim0-rx-scl";
hdmim0_rx_sda = "/pinctrl/hdmi/hdmim0-rx-sda";
hdmi1_out = "/hdmi@fdea0000/ports/port@1";
uart7m0_rtsn = "/pinctrl/uart7/uart7m0-rtsn";
pcfg_pull_down_drv_level_10 = "/pinctrl/pcfg-pull-down-drv-level-10";
ddrphych0_pins = "/pinctrl/ddrphych0/ddrphych0-pins";
pwm0 = "/pwm@fd8b0000";
uart2m2_xfer = "/pinctrl/uart2/uart2m2-xfer";
pdm1m0_sdi0 = "/pinctrl/pdm1/pdm1m0-sdi0";
hdmim1_tx0_scl = "/pinctrl/hdmi/hdmim1-tx0-scl";
hdmim1_tx0_sda = "/pinctrl/hdmi/hdmim1-tx0-sda";
pcfg_pull_none_drv_level_5 = "/pinctrl/pcfg-pull-none-drv-level-5";
pcie30x2m2_clkreqn = "/pinctrl/pcie30x2/pcie30x2m2-clkreqn";
combphy2_psu = "/phy@fee20000";
vp3 = "/vop@fdd90000/ports/port@3";
--
hdmi_receiver@fdee0000 {
power-domains = <0x22 0x1a>;
hpd-gpios = <0x118 0x16 0x01>;
pinctrl-names = "default";
pinctrl-0 = <0x119 0x11a 0x11b 0x11c 0x11d>;
clock-names = "aclk\0audio\0cr_para\0pclk\0ref\0hclk_s_hdmirx\0hclk_vo1";
resets = <0x21 0x1d1 0x21 0x1d2 0x21 0x1d3 0x21 0x294>;
memory-region = <0x117>;
interrupts = <0x00 0xb1 0x04 0x00 0x00 0xb2 0x04 0x00 0x00 0xb3 0x04 0x00>;
clocks = <0x21 0x209 0x21 0x20e 0x21 0x29f 0x21 0x20a 0x21 0x20b 0x21 0x221 0x21 0x2cd>;
compatible = "rockchip,rk3588-hdmirx-ctrler\0snps,dw-hdmi-rx";
status = "okay";
rockchip,grf = <0x6d>;
interrupt-names = "cec\0hdmi\0dma";
reg = <0x00 0xfdee0000 0x00 0x6000>;
phandle = <0x38c>;
rockchip,vo1-grf = <0x6f>;
reset-names = "axi\0apb\0ref\0biu";
};
iommu@fdb50800 {
power-domains = <0x22 0x15>;
clock-names = "aclk\0iface";
interrupts = <0x00 0x76 0x04 0x00>;
clocks = <0x21 0x1b1 0x21 0x1b2>;
#iommu-cells = <0x00>;
compatible = "rockchip,rk3588-iommu\0rockchip,rk3568-iommu";
reg = <0x00 0xfdb50800 0x00 0x40>;
phandle = <0x65>;
};
qos@fdf67200 {
compatible = "rockchip,rk3588-qos\0syscon";
reg = <0x00 0xfdf67200 0x00 0x20>;
phandle = <0x16b>;
};
hdmi0-sound {
simple-audio-card,name = "hdmi0";
simple-audio-card,format = "i2s";
compatible = "simple-audio-card";
--
hdmi-receiver-cma {
alignment = <0x00 0x40000>;
alloc-ranges = <0x00 0x00 0x00 0xffffffff>;
compatible = "shared-dma-pool";
size = <0x00 0xa000000>;
status = "okay";
phandle = <0x117>;
no-map;
};
};
pcie@fe160000 {
power-domains = <0x22 0x22>;
#address-cells = <0x03>;
phy-names = "pcie-phy";
bus-range = <0x10 0x1f>;
clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux\0pipe";
reg-names = "dbi\0apb\0config";
resets = <0x21 0x127 0x21 0x12c>;
interrupts = <0x00 0x102 0x04 0x00 0x00 0x101 0x04 0x00 0x00 0x100 0x04 0x00 0x00 0xff 0x04 0x00 0x00 0xfe 0x04 0x00>;
clocks = <0x21 0x141 0x21 0x146 0x21 0x13c 0x21 0x14b 0x21 0x150 0x21 0x175>;
interrupt-map = <0x00 0x00 0x00 0x01 0x124 0x00 0x00 0x00 0x00 0x02 0x124 0x01 0x00 0x00 0x00 0x03 0x124 0x02 0x00 0x00 0x00 0x04 0x124 0x03>;
#size-cells = <0x02>;
max-link-speed = <0x03>;
device_type = "pci";
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
num-lanes = <0x02>;
compatible = "rockchip,rk3588-pcie\0rockchip,rk3568-pcie";
ranges = <0x1000000 0x00 0xf1100000 0x00 0xf1100000 0x00 0x100000 0x2000000 0x00 0xf1200000 0x00 0xf1200000 0x00 0xe00000 0x3000000 0x00 0x40000000 0x09 0x40000000 0x00 0x40000000>;
msi-map = <0x1000 0x11f 0x1000 0x1000>;
#interrupt-cells = <0x01>;
I also tried the hdmirx image obtained from the following URL, and it works fine. I also compared the GPIO HPD location and it's gpio22. I also tried using the 6.12 kernel version, and the GPIO also shows 54. I'm not sure if this is causing the malfunction. https://gitlab.collabora.com/hardware-enablement/rockchip-3588/debian-image-recipes/-/jobs/527201
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