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riscv: Initial support for debug trigger module

Open no1wudi opened this issue 3 weeks ago • 12 comments

Summary

Implement up_debugpoint_add/up_debugpoint_remove for riscv, based on RISCV Debug Spec 0.13.2

Impact

New feature

Testing

Tested on QEMU and ESP32-C3 with https://github.com/apache/nuttx-apps/pull/2422.

NuttShell (NSH) NuttX-12.5.1
nsh> debug
Testing breakpoints
==== Calling test_function ====
Add breakpoint at 0x80016592
Calling test_trigger
Pass: Breakpoint at 0x80016592 triggered
==== Calling test_data ====
Add read watchpoint at 0x800295cc
Pass: Read watchpoint at 0x800295cc triggered
==== Calling test_data ====
Add read watchpoint at 0x8002c6c0
Pass: Read watchpoint at 0x8002c6c0 triggered
==== Calling test_data ====
Add write watchpoint at 0x8002c6c0
Pass: Write watchpoint at 0x8002c6c0 triggered
==== Calling test_data ====
Add read/write watchpoint at 0x8002c6c0
Pass: Read watchpoint at 0x8002c6c0 triggered
Pass: Write watchpoint at 0x8002c6c0 triggered
nsh> 

no1wudi avatar Jun 25 '24 09:06 no1wudi