使用该源码生成的AD9371工程无法工作问题

[sunnyrain1990]

使用的开发集成环境为VIVADO VITIS 2021，逻辑端使用的是VIVADO 2021板的，底板使用的是ZC706，加载到AD9371开发板中，进行SPI操作时，片选信号CS0，CS1都会置地，导致读数不正常，请问可能是什么原因呢

[danmois]

Hi @sunnyrain1990 ,

First, you could check some minor things: try both the FMC connectors; make sure that you are controlling the RESET signal correctly.

Have you modified the code, or you are just using the no-OS sample project? Furthermore, could you provide the details about the used HDL and no-OS code you are using (release, performed modifications)?

Regards, @danmois