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Ad7616 Split serial vs parallel modes
The axi_ad7616 IP will now contain only the parallel data path of the ADC and the serial infrastructure will be replaced with the SPI Engine framework within the common block design.
Guideline check fails with the following message:
Files with name errors: library/axi_ad7616/axi_ad7616_maxis2wrfifo.v
because the file has been deleted, as it is no longer needed for the axi_ad7616 IP.
ad7616_sdz_zc706_pi:
- modify
adc_db_io
ad_iobuf instantiation similarly to the definition in the ad7616_sdz_zed_pi
ad7616_sdc_zed_pi:
- Update the conversion start signal to the new name,
adc_cnvst
, in the parallel system_top and constraints files in the project.
v2: Regenerated Makefile for ad7616_sdz/zc706
v3: Fix interrupts
Guideline checker failing.
please add readme files with build instructions like for the ad4630 https://github.com/analogdevicesinc/hdl/blob/ad7616_split_si_pi_v2/projects/ad4630_fmc/zed/README.md
v4: Rebased on master.
v5. Squashed commits. Rebased to master.
The IRQ output of AXI_AD7616 us not used any more.
In the system_project.tcl, an example of the non default mode should be given. make SER_PAR_N=0
Also, ZC706 support can be removed in a separate commit part of this pull request.
Done.
v6. Added axi_clkgen instead of using only the sys_cpu_clk