Replace hardcoded "make" invocations in Makefile with $(MAKE)

[danfe]

Makefile calls "make" directly, which is wrong, as actual binary can be called differently (e.g. GNU make is called "gmake" in FreeBSD). Canonical way to reference make implementation that reads your Makefile is to use $(MAKE) instead. Simple patch:

--- Makefile.orig
+++ Makefile
@@ -40,7 +40,7 @@
 tar: clean $(TARFILE)

 $(TARFILE):
-       ( make clean && \
+       ( $(MAKE) clean && \
          cd .. && \
          tar czvf $(TARFILE) --exclude=.svn --exclude=.git --owner=root $(CWDBASE) && \
          mv $(TARFILE) $(CWD) && \
@@ -64,5 +64,5 @@
        rm -f *.[oas] *.ld core* pho xpho pho-*.tar.gz *.rpm
        rm -f build-stamp configure-stamp
        rm -rf debian/pho
-       cd exif; make clean
+       cd exif; $(MAKE) clean