What would be required to add support for SystemVerilog through Surelog+UHDM in YoWASP?

[mithro]

It would be great for the Yosys version in YoWASP to have better SystemVerilog support through the usage of the Surelog+UHDM plugin. What would be the steps for making such a thing happen? Do plugins work with the YoWASP version of Yosys or would they need to be "linked statically" in some way?

• https://github.com/chipsalliance/Surelog
• https://github.com/chipsalliance/UHDM
• https://github.com/SymbiFlow/yosys-f4pga-plugins#uhdm-plugin

BTW It would be awesome to support the other F4PGA (previously Symbiflow) Yosys plugins too, see a list at https://github.com/SymbiFlow/yosys-f4pga-plugins#list-of-plugins