Error: Module "main_pll" Issues with synthesizing code proceeding forward

[ihearta380]

Hello I cloned your repo in the attempts to getting it to work on an Altera 4 development board having the error specifically about the Module main_pll. I bought a lattice board that you had in the video and attempted to get it to work on the lattice board and as I was Importing the P&R file I received this error "Error: Module main_pll is not a valid primitive. Please check!" could you coach me though this step to getting it onto the board thank you very much.

[YetAnotherElectronicsChannel]

Hey there,

sorry it's too long time ago I made this project and I also haven't the tools installed anymore to test this. As far as I know I just used the PLL to generate a 25 MHz (ideally 24.576 MHz) clock for the logic. The board had only a 16 MHz oscillator. Maybe you can check for other projects on that TinyFPGA-BX Platform. Maybe something has changed. Sorry for that.

Am Do., 23. März 2023 um 00:22 Uhr schrieb ihearta380 < @.***>:

Hello I cloned your repo in the attempts to getting it to work on an Altera 4 development board having the error specifically about the Module main_pll. I bought a lattice board that you had in the video and attempted to get it to work on the lattice board and as I was Importing the P&R file I received this error "Error: Module main_pll is not a valid primitive. Please check!" could you coach me though this step to getting it onto the board thank you very much. [image: Screenshot (1)] https://user-images.githubusercontent.com/30456791/227060305-d7f82a5d-346d-4898-9413-c9a560cc60f6.png

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