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Xilinx
Xilinx Embedded Software (embeddedsw) Development
Function "Xil_DCacheInvalidateRange" has an infinite loop possibility when USE_AMP=1 This has taken me days of head scratching with lock-ups on Core1 of Zynq device.... The offending lines are: while (tempadr...
In bare-metal application derived from a hello world template when default configuration is used, `emacps_send_handler` will be called in interrupt context, in which `xemacps_process_sent_bds` calls pbuf_free. https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/ThirdParty/sw_services/lwip213/src/contrib/ports/xilinx/netif/xemacpsif_dma.c#L289-L305 However, the protection...
The documentation of `XUsbPs_ConfigureDevice` mentions a macro called `XUsbPs_DeviceMemRequired()` but it doesn't exist. A macro of the same name is mentioned in the examples as well. So the required size...
Hi all, I'm trying to write a multi-core baremetal application that requires mutex for accessing shared data. However, I'm not able to import "xmutex.h". I also tried to add both...
UART and IRQ ID should probably match, see https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c#L69 versus https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_intr_example.c#L71
Function XV_SdiTxSs_ConfigTable in xv_sditxss_g.c maps XPAR_V_SMPTE_UHDSDI_TX_SS_INCLUDE_ADV_FEATURES to the element XVidC_PixelsPerClock Ppc of XV_SdiTxSs_Config.
In xv_sdirx_hw.h the XV_SDIRX_REGISTER_SIZE is set to 27 but needs to be increased to 35 to acces all registers in the sdi rx core. Same for xv_sditx_hw.h .
Please re-test the example found here: https://github.com/Xilinx/embeddedsw/blob/master/ThirdParty/bsp/freertos10_xilinx/examples/freertos_intr_example.c. It doesn't work, and I'm not the first to notice: https://forum.digilent.com/topic/24684-zynq-ultrascale-example-with-freertos-using-interrupts-on-a-uart-or-other-interrupt-source/ All my TTCs are enabled in Vivado. The baremetal example (https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/ttcps/examples/xttcps_intr_example.c) _does_...
In lwIP, only the RTL8211E is supported. The ArtyZ7 series of development boards by Digilent use the newer RTL8211F and require a modified version of lwIP to work. Digilent never...
### Problem 1: device tree mismatch in embeddedsw The rfdc driver expects a device tree with most of the configuration tucked into a "param-list" entry, as can be seen [here](https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/rfdc/src/xrfdc_sinit.c#LL150C1-L152C1):...
