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Published 20 hours ago • verified publisher icon Xilinx

loss nan

Open wanglu4042 opened this issue 1 year ago • 6 comments

Hi, I finished a network with weight_bit_width=2, but when I set weight_bit_width=1, this warning come up. image What is wrong? And how can I fix it? Looking forward to your reply! Thanks

wanglu4042 avatar Jul 02 '23 15:07 wanglu4042

maybe the weight width is too small

MohamedA95 avatar Jul 04 '23 09:07 MohamedA95

Hi，thanks for your reply! I do think so but I want to train a net with 1 bit width, what can I do to achieve this goal? Is there any solution? Looking forward to your reply!

wanglu4042 avatar Jul 04 '23 12:07 wanglu4042

I have not explored this part yet, so I can not help

MohamedA95 avatar Jul 04 '23 14:07 MohamedA95

Thanks for your reply! I was troubled by this. If there are any questions I think we can discuss about it.

wanglu4042 avatar Jul 04 '23 15:07 wanglu4042

sure, but I guess discussions would be a better option than issues

MohamedA95 avatar Jul 05 '23 07:07 MohamedA95

I have run into this issue even with 8-bit weights or 16-bit weights. See my model at https://github.com/Xilinx/brevitas/discussions/679, but many variations of it have the same behavior.

j2kun avatar Jul 17 '23 21:07 j2kun