FIR AIE tutorial hangs while running on run_emu stage

[praveen0447]

Hi,

I am trying the 2022.2 version of AIE FIR tutorial on an emulator. I was able to create the application and xclbin with the steps mentioned in the link. However, when I launch the application it hangs at "A72-Info: (Step 5) Wait for Data Mover Kernels to Complete "

Please let me know what am I missing here. Attached is the log for your reference.log.txt

The only point I deviated from the example is, that the VCK190 Vitis Platform for 2022.2 is not available. I used the one shipped with /tools/Xilinx/Vitis/2022.2/base_platforms/xilinx_vck190_base_202220_1 (Copied them to tools/Xilinx/Vitis/2022.2/platforms).

Thanks, Praveen.

[xflorentw]

HI @praveen0447

Did you build the project using the makefile?

Also how long did you wait? Because there is profiling enabled, it can take days to complete on hw emulation. One thing you can try is to change the following line to xrt_trace=false (re-run packaging after this) https://github.com/Xilinx/Vitis-Tutorials/blob/2022.2/AI_Engine_Development/Design_Tutorials/07-firFilter_AIEvsHLS/AIE/design/profiling_configs/xrt.ini#L19

[SURUTHI1605]

Hi @praveen0447 In design is having xrtRunWait option - will Wait for a run to complete https://xilinx.github.io/XRT/master/html/xrt_native.main.html. It may take sometime to complete.Can you share me the TAP and FILTER SIZE in which you are experincing this issue?

[SURUTHI1605]

Hi @praveen0447 , In 2022.1 version, this issue won't be there and in hw_emu the design will take max 10 minutes to complete. I'm in that debugging process and will let you know the solution once it's done.

[praveen0447]

Hi @SURUTHI1605 , 

We tried @xflorentw suggested fix with no luck.   Let me know if we can try the 2022.2 tutorial example on hardware. Do you foresee any similar issues with the hardware?  Do you want us to proceed with running the tutorial 2022.1 version for the emulator/hardware until there is a fix for afore mentioned issue?     I used the default sizes mentioned in the examples.I assume the filter size is 1 and the taps are 15, the window size is 256. Below generated build folder build/fir_15_taps/x1_firs/winSz_256/

Thanks,  Praveen. 

[SURUTHI1605]

Hi @praveen0447 The issue is with some handshaking signals.We found a fix and about to checked-in in repo .For now please use tutorials of 2022.1 version for emulator/hardware.

Thanks, suruthi

[praveen0447]

Hi @SURUTHI1605

I tried to run the example using 2022.1. I am facing compilation error during make graph step. Attached is the log(fir_aie_2022_1_compilationError_make_graph.txt) for you reference

Please let me know if I am missing anything here.

Thanks, Praveen.

[SURUTHI1605]

Can you share me the vitis build and platform details you have sourced?

[xflorentw]

@praveen0447 Make sure you are also using the version 2022.1 of the DSPlib (Vitis Libraries)

[praveen0447]

Hi @SURUTHI1605

I used the vck190 platform for 2022.1 and Vitis 2022.1 for which I got issues. I've attached the log in the previous reply as the paths which mention my build and toolchain details.

@xflorentw Even with the Vitis 2022.1 DSP library, I see the same issue.Since the compilation error is related to the graph class constructor does the DSP library matter here?

Thanks, Praveen.