ERROR: [v++ 60-602]

[canozcifci]

Hi,

I am facing a problem when i build vector addition application project. I can build with Emulation-SW, but when I tried to build with Emulation-HW or Hardware. I got the error: ERROR: [v++ 60-602] Source file does not exist: /Xilinx/kv260-vitis/platforms/ws/add_vector_00_system_hw_link/Emulation-HW/binary_container_1.xclbin INFO: [v++ 60-1662] Stopping dispatch session having empty uuid. INFO: [v++ 60-1653] Closing dispatch client. makefile:38: recipe for target 'package' failed make: *** [package] Error 1.

Thanks John

[imrickysu]

Hi John,

binary_container_1.xclbin is the output of v++ link. I guess your v++ link doesn't complete successfully. Could you check whether there are any error information?

[canozcifci]

Hi Ricky,

Thanks for the quick reply. I followed the instructions "Vitis 2021.1 Embedded Platform for Zybo-Z7-20" by Mohammad

here

Can you tell me where i can find the necessary error info for v++ link?

Thanks John

[imrickysu]

Hi @canozcifci , if you select the hw_link component under the system project, it will show you related building info.

When selecting the system project, it only shows you the packaging related info.

[Seyyidosman]

Hi, I am also facing with this problem. Please help me!

Seyyid

[mor2810]

any fix for that issue ? i have exactly the same error