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Is the hardware design configurable?

Open gitosu67 opened this issue 4 years ago • 0 comments

Can we generate all the IPs using the code provided or create custom IPs? For example, the files https://github.com/Xilinx/CHaiDNN/tree/master/design/ can they be modified and recompiled then run on FPGA?

gitosu67 avatar May 02 '20 19:05 gitosu67