WorksButNotTested
WorksButNotTested
Hi. Thanks for your bug report. Looks like an oversight in [**gum_stalker_iterator_handle_thumb_branch_insn**](https://github.com/frida/frida-gum/blob/master/gum/backend-arm/gumstalker-arm.c). As you will know, with the program counter being architecturally visible in AARCH32, there are a great number...
Excellent thanks. I’ll use those for the unit test. Was this compiled code? Or hand written assembly? If you know which compiler was used that would be interesting. I’ve mostly...
In the original version of Thumb, there was only a single encoding of the MOV instruction which could modify the PC. However, the [Thumb-2 supplement](http://class.ece.iastate.edu/cpre288/resources/docs/Thumb-2SupplementReferenceManual.pdf) stated: """ Encoding T1 All...
I suspect you may well find more instructions that are yet to be supported for Thumb-2. But time permitting, I am happy to try to fix them. If you are...
@bluzye any feedback welcome. Cheers.
Hi. Thanks for the feedback. Can you just let us know the faulting instruction (and op-code), and the cpu you are running on? I suspect it might be caused by...
http://shell-storm.org/online/Online-Assembler-and-Disassembler/?opcodes=%5Cx4c%5Cxf2%5Cx47%5Cxde%5Cx4e%5Cx4a%5Cxb1%5Cx46%5Cx7a%5Cx44%5Cxd3%5Cx58%5Cx43%5Cx44%5Cx9f%5Cx46%0D%0A%5Cx52%5Cxf8%5Cx21%5Cx60%5Cx46%5Cx44%5Cxb7%5Cx46%5Cx52%5Cxf8%5Cx25%5Cx60%5Cx46%5Cx44%5Cxb7%5Cx46&arch=arm-t&endianness=little&dis_with_addr=True&dis_with_raw=True&dis_with_ins=True#disassembly 0x0000000000000000: 4C F2 47 DE bl #0xa4cc92 0x0000000000000004: 4E 4A ldr r2, [pc, #0x138] 0x0000000000000006: B1 46 mov sb, r6 0x0000000000000008: 7A 44 add r2, pc 0x000000000000000a: D3 58...
Looks like it is actually the instruction at offset 0x0e above which is faulting. Architecture versionsEncoding T1 All versions of the Thumb instruction set. Before Thumb-2, encoding T1 required that...
Looking at the LDR.W instruction @ 0x9D8E ... http://class.ece.iastate.edu/cpre288/resources/docs/Thumb-2SupplementReferenceManual.pdf Section 4.6.45. Encoding T2 All versions of the Thumb instruction set from Thumb-2 onwards. Hence the CPU must support Thumb-2 instructions...
Really struggling to figure out what the issue could be to be honest. Are you able to send a copy of the binary and instructions on how to re-produce the...