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Questions about non-atomic instructions like `i32.store`
when i32.store
writes data to a shared memory, it's performed with an wr
action. (https://webassembly.github.io/threads/core/exec/instructions.html#t-mathsf-xref-syntax-instructions-syntax-instr-memory-mathsf-store-n-xref-syntax-instructions-syntax-memarg-mathit-memarg)
those events are atomically performed according to https://webassembly.github.io/threads/core/exec/runtime.html#events.
thus, if a runtime implements atomic instructions like i32.atomic.rmw.cmpxchg
via a lock, non-atomic instructions like i32.store
should take the lock too, at least when operating on a shared memory.
is it the correct reading of the spec?
background: some applications (eg. musl) implements a mutex with atomic cmpxchg for lock and ordinary store + barrier for unlock. as far as i know, it's fine for eg. x86. however, a naive porting to wasm might or might not cause problems.