simd

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We had a good discussion about optimizations and how they fit into the instruction set at the 2021-01-22 meeting. What I believe we are discussing is whether there are or...

lars-t-hansen

Include vectorized bit count instructions

5

@AndrewScheidecker mentioned in his review of #1 the possibility of including vectorized bit counting instructions to match the existing scalar instructions. They would have these signatures: - `i8x16.clz(x: v128) ->...

stoklund

Folding integer additions with operands of mixed bit widths

1

ARM NEON has pairwise-folding addition instructions where pairs of narrow (e.g. 8-bit) input lanes are added together and accumulated into wider (e.g. 16-bit) integer lanes. For example SADALP, SADDLP. This...

bjacob

Target chips for each instruction set

2

@zeux 's example from the meeting (#369) using Godbolt using llvm to do MCA analysis is great. It gives us at the very least, LLVM's cost analysis and cycle predictions...

omnisip

LLVM Cost Tuning

11

Hi everyone, I'm creating this ticket to keep Compiler Level Common Subexpression Elimination (#403) separate from LLVM Cost Tuning -- which is a common annoyance but is very different from...

omnisip

Common Subexpression Elimination

3

Hi everyone, @abrown asked me to look into optimizations for the extended multiplication in #376 that would reduce the number of shuffles before executing `pmuldq` (The proposed optimization is [here](https://gist.github.com/omnisip/67850c665ac33ced75272b3780f2a937))....

omnisip

v128.move32_zero and v128.move64_zero instructions extensions to #237

11

# Introduction @Maratyszcza has done a wonderful job describing the use cases and functionality of load64_zero and load32_zero in #237. This proposal seeks to extend the functionality of load64_zero and...

omnisip

Double-precision SIMD conversions

5

Currently WebAssembly SIMD specification is missing all kinds of double-precision `f64x2` conversions. The instruction set needs at least the following conversions to be usable: - SIMD double-precision to single-precision floating-point...

Maratyszcza

i64x2.widen_(low/high)_i32x4_(s/u) instructions extensions for 8-bit and 16-bit integers

4

# Introduction This proposal mirrors #290 to add new variants of existing `widen` instructions and extends the 32 and 64 widen instructions to include support from 16 and 8-bit integers....

omnisip

Use specific `uN` types for `ImmLaneIdxM` representations

10

This is a follow-up to https://github.com/WebAssembly/simd/issues/242 and an extraction from the discussion in https://github.com/WebAssembly/threads/issues/162#issuecomment-640792474. Short version: could we define binary representations of `ImmLaneIdx*` via custom-length `u*` types? The WebAssembly grammar...

RReverser